A four-quadrant subthreshold mode multiplier for analog neural-network applications

IEEE Transactions on Neural Networks

Volumn 7, Issue 5, 1996, Pages 1212-1219

  Coué, Dominique ^a   Wilson, George ^a  

^a UNIVERSITY OF PLYMOUTH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; GATES (TRANSISTOR); INTERCONNECTION NETWORKS; LINEAR INTEGRATED CIRCUITS; MULTIPLYING CIRCUITS; VLSI CIRCUITS;

ANALOG NEURAL NETWORKS; DIFFERENTIAL PAIRS; FOUR QUADRANT MULTIPLIER; SUBTHRESHOLD MODE; VOLTAGE SWINGS;

NEURAL NETWORKS;

EID: 0030243260     PISSN: 10459227     EISSN: None     Source Type: Journal    
DOI: 10.1109/72.536315     Document Type: Article

References (13)

1. J. M. Zurada, Introduction to Artificial Neural Systems. St. Paul, MN: West, 1992.
2. C. Mead, Analog VLSI and Neural Systems. Reading, MA: Addison-Wesley, 1989.
3. M. H. Cohen and A. G. Andreou, "Current-mode subthreshold MOS implementation of the Herault-Jutten autoadaptive network," IEEE J. Solid-State Circuits, vol. 27, pp. 714-727, May 1992.
4. B. Linares-Barranco, E. Sánchez-Sinencio, A. Rodríguez-Vázquez, and J. L. Huertas, "A modular T-mode design approach for analog neural-network hardware implementation," IEEE J. Solid-State Circuits, vol. 27, pp. 701-713, May 1992.
5. _, "A CMOS analog adaptive BAM with on-chip learning and weight refreshing," IEEE Trans. Neural Networks, vol. 4, pp. 445-455, May 1993.
6. B. Gilbert, "A precise four-quadrant multiplier with subnanosecond response," IEEE J. Solid-State Circuits, vol. SC-3, pp. 365-373, Dec. 1968.
7. E. Vittoz and J. Fellrath, "CMOS analog integrated circuits based on weak inversion operation," IEEE J. Solid-State Circuits, vol. SC-12, pp. 224-231, June 1977.
8. A. Pavasovic, "Subthreshold region MOSEFT mismatch analysis and modeling for analog VLSI systems," Ph.D. dissertation, Johns Hopkins Univ., Baltimore, MD, 1990.
9. A. G. Andreou, K. A. Boahen, P. O. Pouliquen, A. Pavasovic, R. E. Jenkins, and K. Strohbehn, "Current-mode subthreshold MOS circuits for analog VLSI neural systems," IEEE Trans. Neural Networks, vol. 2, pp. 205-213, Mar. 1991.
10. S. Haykin, Neural Networks: A Comprehensive Foundation. New York: Macmillan, 1994.
11. Y. Wang, "A modular analog CMOS LSI for feedforword neural networks with on-chip BEP learning," in Proc. IEEE Int. Symp. Circuits and Syst., 1993.
12. C. Eichenberger and W. Guggenbuhl, "On charge injection in analog MOS switches and dummy switch compensation techniques," IEEE Trans. Circuits and Syst., vol. 37, pp. 256-264, Feb. 1990.
13. A. F. Murray, "Silicon implementations of neural networks," IEE Proc., vol. 138, pp. 3-12, Feb. 1991.