Downscaling ULSIs by using nanoscale engineering

Microelectronic Engineering

Volumn 32, Issue 1-4 SPEC. ISS., 1996, Pages 31-48

  Asai, Shojiro ^a   Wada, Yasuo ^a   Takeda, Eiji ^a  

^a HITACHI LTD   (Japan)

Author keywords

Nanoscale engineering; Nanotechnology; ULSI

Indexed keywords

DOPING (ADDITIVES); ETCHING; FILM PREPARATION; MOS DEVICES; MOSFET DEVICES; NANOTECHNOLOGY; PATTERN RECOGNITION; TRANSISTORS;

NANOELECTRONICS;

ULSI CIRCUITS;

EID: 0030234520     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/0167-9317(95)00182-4     Document Type: Article

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