Scaling silicon MOS devices to their limits

Microelectronic Engineering

Volumn 32, Issue 1-4 SPEC. ISS., 1996, Pages 271-282

  Wind, S J ^a   Frank, D J ^a   Wong, H S ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

CMOS; Double gate MOSFET; MOSFET; Scaling; Short channel effects

Indexed keywords

GATES (TRANSISTOR); MOSFET DEVICES; NANOTECHNOLOGY; PERFORMANCE; PRINTED CIRCUIT DESIGN; SEMICONDUCTING SILICON;

MINIATURIZATION;

CMOS INTEGRATED CIRCUITS;

EID: 0030233199     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/0167-9317(96)00008-1     Document Type: Article

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