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Volumn 143, Issue 5, 1996, Pages 295-300

Verification of speed-independent data-path circuits

Author keywords

Speed independent data path circuits; Verification techniques

Indexed keywords

MATHEMATICAL TECHNIQUES; MICROPROCESSOR CHIPS; MULTIPLYING CIRCUITS;

EID: 0030232589     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:19960703     Document Type: Article
Times cited : (2)

References (15)
  • 1
    • 0003464679 scopus 로고
    • Voss - A formal hardware verification system: User's guide
    • Department of Computer Science, University of British Columbia, Vancouver, BC
    • SEGER, C.-J.: 'Voss - A formal hardware verification system: User's guide'. Technical report UBC-CS-93-45, Department of Computer Science, University of British Columbia, Vancouver, BC, 1993
    • (1993) Technical Report UBC-CS-93-45
    • Seger, C.-J.1
  • 4
    • 0029540980 scopus 로고
    • The formal verification of a pipelined double-precision IEEE floating-point multiplier
    • AAGAARD, M.D., and SEGER, C.-J.: 'The formal verification of a pipelined double-precision IEEE floating-point multiplier'. Proc. 1995 ICCAD, 1995
    • (1995) Proc. 1995 ICCAD
    • Aagaard, M.D.1    Seger, C.-J.2
  • 5
    • 0028413136 scopus 로고
    • Symbolic model checking for sequential circuit verification
    • BURCH, J.R., CLARKE, E.M., LONG, D.E., MCMILLAN, K.L., and DILL, D.L.: 'Symbolic model checking for sequential circuit verification', IEEE Trans., 1994, CAD-13, (4), pp. 401-424
    • (1994) IEEE Trans. , vol.CAD-13 , Issue.4 , pp. 401-424
    • Burch, J.R.1    Clarke, E.M.2    Long, D.E.3    Mcmillan, K.L.4    Dill, D.L.5
  • 6
    • 0027677633 scopus 로고
    • Delay-insensitive multi-ring structures
    • SPARSØ, J., and STAUNSTRUP, J.: 'Delay-insensitive multi-ring structures', INTEGRATION, 1993, 15, (3), pp. 313-340
    • (1993) Integration , vol.15 , Issue.3 , pp. 313-340
    • Sparsø, J.1    Staunstrup, J.2
  • 12
  • 13
    • 0001510331 scopus 로고
    • Formal verification by symbolic evaluation of partially-ordered trajectories
    • SEGER, C.-J., and BRYANT, R.E.: 'Formal verification by symbolic evaluation of partially-ordered trajectories', Form. Methods Syst. Des., 1995, 6, (2)
    • (1995) Form. Methods Syst. Des. , vol.6 , Issue.2
    • Seger, C.-J.1    Bryant, R.E.2
  • 14
    • 0026913667 scopus 로고
    • Symbolic boolean manipulation with ordered binary decision diagrams
    • BRYANT, R.E.: 'Symbolic boolean manipulation with ordered binary decision diagrams', ACM Comput. Surveys, 1992, 24, (3), pp. 293-318
    • (1992) ACM Comput. Surveys , vol.24 , Issue.3 , pp. 293-318
    • Bryant, R.E.1
  • 15


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.