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1
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0025382877
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A circuit design for 2-Gb/s Si bipolar crosspoint switch LSI's
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Feb.
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M. Suzuki, N. Yamanaka, M. Hirata, and S. Kikuchi, "A circuit design for 2-Gb/s Si bipolar crosspoint switch LSI's," IEEE J. Solid-State Circuits, vol. 25, pp. 155-159, Feb. 1990.
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IEEE J. Solid-State Circuits
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Suzuki, M.1
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Kikuchi, S.4
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2
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84975346442
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A 5 Gb/s 16 x 16 Si-bipolar crosspoint switch
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San Francisco, CA, Feb. 19-21
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H. Shin, J. Warnock, M. Immediato, K. Chin, C. T. Chuang, M. Cribb, D. Heidel, Y. C. Sun, N. Mazzeo, and S. Brodsky, "A 5 Gb/s 16 x 16 Si-bipolar crosspoint switch," in Proc. IEEE Int. Solid-State Circuits Conf., San Francisco, CA, Feb. 19-21, 1992, pp. 228-229.
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Proc. IEEE Int. Solid-State Circuits Conf.
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Shin, H.1
Warnock, J.2
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Chin, K.4
Chuang, C.T.5
Cribb, M.6
Heidel, D.7
Sun, Y.C.8
Mazzeo, N.9
Brodsky, S.10
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4
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0017905741
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Picosecond pulses on superconducting striplines
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Kautz, R.L.1
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5
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33748282329
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128 x 128 superconducting crossbar switch
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Tokyo, Japan, Sept.
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F. Bedard, "128 x 128 superconducting crossbar switch," presented at the Int. Superconductive Electronics Conf. (ISEC), Tokyo, Japan, Sept. 1995.
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(1995)
Int. Superconductive Electronics Conf. (ISEC)
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Bedard, F.1
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6
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0027559463
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A 5-32 b decoder for application in a crossbar switch
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Feld, D.A.1
Hebert, D.F.2
Van Duzer, T.3
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8
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0024611437
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Josephson modified variable threshold logic gates
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Feb.
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Fujimaki, N.1
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9
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0018504889
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Loop decoder for Josephson memory arrays
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Faris, S.M.1
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10
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33748278341
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Novel superconductive signal processing circuits
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Glasgow, Scotland, June
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J. Fleischman, D. A. Feld, and T. Van Duzer, "Novel superconductive signal processing circuits," presented at the Extended Abstracts Int. Superconductive Elec. Conf. (ISEC), Glasgow, Scotland, June 1991.
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(1991)
Extended Abstracts Int. Superconductive Elec. Conf. (ISEC)
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Fleischman, J.1
Feld, D.A.2
Van Duzer, T.3
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0024719367
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Josephson memory technology
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Wada, Y.1
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12
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33748257775
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A fully functional 5-bit-serial-in, 32-line-parallel-out decoder
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Boulder, CO, Aug. 11-14
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D. A. Feld, D. F. Hebert, T. Van Duzer, P. F. Yuh, and S. R. White-ley, "A fully functional 5-bit-serial-in, 32-line-parallel-out decoder," presented at the Extended Abstracts Int. Superconductive Electronics Conf. (ISEC), Boulder, CO, Aug. 11-14, 1993.
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(1993)
Extended Abstracts Int. Superconductive Electronics Conf. (ISEC)
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Feld, D.A.1
Hebert, D.F.2
Van Duzer, T.3
Yuh, P.F.4
White-ley, S.R.5
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