Minimizing floating-body-induced threshold voltage variation in partially depleted SOI CMOS

IEEE Electron Device Letters

Volumn 17, Issue 8, 1996, Pages 391-394

  Wei, Andy ^a   Antoniadis, Dimitri A ^a   Bair, Lawrence A ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CHARGE; GATES (TRANSISTOR); MOS DEVICES; SEMICONDUCTING FILMS; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING; SEMICONDUCTOR SWITCHES; SILICON ON INSULATOR TECHNOLOGY; SWITCHING FUNCTIONS;

CHANNEL DOPING; CHANNEL LENGTH; FLOATING BODY EFFECTS; GATE OXIDE THICKNESS; PULSE FREQUENCY; PULSE PROPAGATION; PULSE STRETCHING; SILICON FILM THICKNESS; SUPPLY VOLTAGE; THRESHOLD VOLTAGE;

CMOS INTEGRATED CIRCUITS;

EID: 0030216887     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.511585     Document Type: Article

References (12)

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