Distributed Simulation of Parallel DSP Architectures on Workstation Clusters

Simulation

Volumn 67, Issue 2, 1996, Pages 94-105

  George, Alan D ^a   Cook, Steven W ^a  

^a FAMU FSU COLLEGE OF ENGINEERING   (United States)

Author keywords

distributed simulation; parallel computing; processor libraries; signal processing

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING LANGUAGES; COMPUTER SOFTWARE; COMPUTER WORKSTATIONS; DIGITAL SIGNAL PROCESSING; PARALLEL PROCESSING SYSTEMS; PROGRAM PROCESSORS; VLSI CIRCUITS;

DIGITAL SIGNAL PROCESSOR; DISTRIBUTED SIMULATION; FUNCTIONAL MODELING; PARALLEL PROGRAMMING LANGUAGE; PROCESSOR LIBRARIES; WORKSTATION CLUSTERS;

COMPUTER SIMULATION;

EID: 0030216875     PISSN: 00375497     EISSN: None     Source Type: Journal    
DOI: 10.1177/003754979606700204     Document Type: Article

References (14)

1. George, A., “Simulating Microprocessor-based Parallel Computers using Processor Libraries,” SIMULATION, Vol. 60, No. 1, pp. 37-42, February 1993.
2. Anderson, T., D. Culler, and D. Patterson, “A Case for NOW (Networks of Workstations),” IEEE Micro, Vol. 15, No. 1, pp. 54-64, February 1995.
3. Kloker, K., B. Lindsley, S. Liberman, P. Marino, E. Rushinek, and G.D. Hillman, “The Motorola DSP96002 IEEE Floating-Point Digital Signal Processor,” Proceedings of the IEEE International Conference on ASSP, May 1989.
4. DSP96002 IEEE Floating-Point Dual-Port Processor User's Manual, Publication No. DSP96002UM/AD, Motorola Inc., Austin, Texas, 1989.
5. Motorola DSP96002 Digital Signal Processor Simulator Reference Manual, Motorola Inc., Austin, Texas, 1989.
6. Johnson, B., Design and Analysis of Fault-Tolerant Digital Systems, Addison-Wesley Publishing Company, Reading, Massachusetts, 1989.
7. George, A. and L. Hawkes, Microprocessor-Based Parallel Architecture for Reliable DSP Systems, CRC Press Inc., Boca Raton, FL, 1992.
8. Ahuja, S., N. Carriero, and D. Gelernter, “Linda and Friends,” IEEE Computer, Vol. 19, No. 8, pp. 26-34, August 1986.
9. Gelernter, D., “Domesticating Parallelism,” IEEE Computer, Vol. 19, No. 8, pp. 12-19, August 1986.
10. Carriero, N. and D. Gelernter, “How to Write Parallel Programs: A Guide to the Perplexed,” ACM Computing Surveys, pp. 323-357, September 1989.
11. Carriero, N. and D. Gelernter, How to Write Parallel Programs, The MIT Press, Cambridge, Massachusetts, 1992.
12. C-Linda User's Guide and Reference Manual Version 2.5.2, Scientific Computing Associates, 1993.
13. Carriero, N., E. Freeman, D. Gelernter, and D. Kaminsky, “Adaptive Parallelism and Piranha,” IEEE Computer, Vol. 28, No. 1, pp. 40-49, January 1995.
14. Hwang, K., Advanced Computer Architecture, McGraw-Hill, New York, NY, 1993