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Volumn 19, Issue 3, 1996, Pages 473-480

Effects and modeling of simultaneous switching noise for BiCMOS off-chip drivers

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC RESISTANCE; FEEDBACK; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS; SWITCHING; TRANSIENTS;

EID: 0030214754     PISSN: 10709894     EISSN: None     Source Type: Journal    
DOI: 10.1109/96.533885     Document Type: Article
Times cited : (5)

References (11)
  • 3
    • 0025702847 scopus 로고
    • BiCMOS circuits tackle fast bus interfaces
    • Feb.
    • D. Bursky, "BiCMOS circuits tackle fast bus interfaces," Electronic Design, pp. 115-116, Feb. 1990.
    • (1990) Electronic Design , pp. 115-116
    • Bursky, D.1
  • 5
    • 0022117244 scopus 로고
    • Delta-I noise specification for a high-performance computing machine
    • Sept.
    • G. A. Katopis, "Delta-I noise specification for a high-performance computing machine," Proc. IEEE, vol. 73, no. 9, p. 1405, Sept. 1985.
    • (1985) Proc. IEEE , vol.73 , Issue.9 , pp. 1405
    • Katopis, G.A.1
  • 6
    • 0026258666 scopus 로고
    • Simultaneous switching ground noise calculation for packaged CMOS devices
    • Nov.
    • R. Senthinathan and J. Prince, "Simultaneous switching ground noise calculation for packaged CMOS devices," IEEE J. Solid-State Circuits, vol. 26, no. 11, pp. 1724-1728, Nov. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , Issue.11 , pp. 1724-1728
    • Senthinathan, R.1    Prince, J.2
  • 9
    • 0025474623 scopus 로고
    • Elmasry, scaling of digital BiCMOS circuits
    • Aug.
    • A. Bellaouar, S. H. Embabi, and M. I. "Elmasry, scaling of digital BiCMOS circuits," IEEE J. Solid-State Circuits, vol. 25, no. 4, pp. 932-941, Aug. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.4 , pp. 932-941
    • Bellaouar, A.1    Embabi, S.H.2    I., M.3
  • 11
    • 0026840163 scopus 로고
    • Performance-driven scaling of BiCMOS technology
    • Mar.
    • P. A. Raje, K. C. Saraswat, and K. M. Cham, "Performance-driven scaling of BiCMOS technology," IEEE Trans. Electron Dev., vol. 39, no. 3, pp. 685-694, Mar. 1992.
    • (1992) IEEE Trans. Electron Dev. , vol.39 , Issue.3 , pp. 685-694
    • Raje, P.A.1    Saraswat, K.C.2    Cham, K.M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.