Clocked-sense-amplifier-based smart-pixel optical receivers

IEEE Photonics Technology Letters

Volumn 8, Issue 8, 1996, Pages 1067-1069

  Woodward, T K ^a,b   Krishnamoorthy, A V ^a,b   Goossen, K W ^a,b   Walker, J A ^b   Cunningham, J E ^b   Jan, W Y ^b   Chirovsky, L M F ^a,b   Hui, S P ^b   Tseng, B ^b   Kossives, D ^b   Dahringer, D ^b   Bacon, D ^b   Leibenguth, R E ^b  

^a IEEE

^b LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFICATION; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DESIGN; DIGITAL SIGNAL PROCESSING; ELECTRIC CURRENTS; ENERGY DISSIPATION; FEEDBACK; LIGHT MODULATORS; PHOTODETECTORS; SIGNAL RECEIVERS; TELECOMMUNICATION REPEATERS;

CLAMPED BIT LINE SENSE AMPLIFIER; CLOCKED SENSE AMPLIFIERS; DIGITAL AMPLIFICATION; MULTIQUANTUM WELLS; PHOTOCURRENT LEVELS; POWER DISSIPATION; SMART PIXEL OPTICAL RECEIVERS;

LIGHT AMPLIFIERS;

EID: 0030212077     PISSN: 10411135     EISSN: None     Source Type: Journal    
DOI: 10.1109/68.508740     Document Type: Article

References (6)

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5. T. N. Blalock and R. C. Jaeger, "A high-speed sensing scheme for 1T dynamic RAM's utilizing the clamped bit-line sense amplifier," IEEE J. Solid State Circuits vol. 27, pp. 618-625 1992 (and references therein).
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