메뉴 건너뛰기




Volumn 12, Issue 4, 1996, Pages 271-279

Reliability challenges for low voltage/low power integrated circuits

Author keywords

Integrated circuits; Low power; Low voltage; Microelectronics; Reliability; Semiconductor devices; Semiconductor technology

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; ELECTRIC POWER SUPPLIES TO APPARATUS; GATES (TRANSISTOR); INTEGRATED CIRCUITS; MICROELECTRONICS; RELIABILITY; SEMICONDUCTOR DEVICES; SEMICONDUCTOR JUNCTIONS; SILICON ON INSULATOR TECHNOLOGY;

EID: 0030197282     PISSN: 07488017     EISSN: None     Source Type: Journal    
DOI: 10.1002/(SICI)1099-1638(199607)12:4<271::AID-QRE30>3.0.CO;2-Q     Document Type: Article
Times cited : (2)

References (43)
  • 1
    • 0029292870 scopus 로고
    • Technology leverage for ultra-low power information systems
    • J. M. C. Stork, 'Technology leverage for ultra-low power information systems', Proceedings of the IEEE, 83, 607-618 (1995).
    • (1995) Proceedings of the IEEE , vol.83 , pp. 607-618
    • Stork, J.M.C.1
  • 2
    • 0003552056 scopus 로고
    • The national technology roadmap for semiconductors
    • Semiconductor Industry Association
    • 'The national technology roadmap for semiconductors', Tech. Rep., Semiconductor Industry Association, 1994.
    • (1994) Tech. Rep.
  • 5
    • 0008743759 scopus 로고
    • The submicron MOSFET
    • S. M. Sze (ed.), Wiley, New York, ch. 3
    • J. R. Brews, 'The submicron MOSFET', in S. M. Sze (ed.), High-Speed Semiconductor Devices Wiley, New York, 1990, ch. 3, pp. 139-210.
    • (1990) High-Speed Semiconductor Devices , pp. 139-210
    • Brews, J.R.1
  • 6
    • 4043173741 scopus 로고    scopus 로고
    • Introduction to Low-Power VLSI design
    • Low Power VLSI Design and Technology
    • G. Yeap and A. Wild, 'Introduction to Low-Power VLSI design', to appear in Int. J. of Electronics and Systems, special issue on Low Power VLSI Design and Technology, 7, 1996.
    • (1996) Int. J. of Electronics and Systems , vol.7 , Issue.SPEC. ISSUE
    • Yeap, G.1    Wild, A.2
  • 7
    • 0028448788 scopus 로고
    • Power consumption estimation in CMOS VLSI chips
    • D. Liu and C. Svensson, 'Power consumption estimation in CMOS VLSI chips', IEEE J. Solid-State Circuits, 29, 663-670, 1994.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , pp. 663-670
    • Liu, D.1    Svensson, C.2
  • 10
    • 0029267889 scopus 로고
    • State assignment for low power dissipation
    • L. Benini and G. D. Micheli, 'State assignment for low power dissipation', IEEE J. Solid-State Circuits, 30, 258-266, 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , pp. 258-266
    • Benini, L.1    Micheli, G.D.2
  • 11
    • 0028449675 scopus 로고
    • A low-power, area-efficient digital filter for decimation and interpolation
    • B. P. Brandt and B. A. Wooley, 'A low-power, area-efficient digital filter for decimation and interpolation', IEEE J. Solid-State Circuits, 29, 679-686, 1994.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , pp. 679-686
    • Brandt, B.P.1    Wooley, B.A.2
  • 13
    • 0022733092 scopus 로고
    • A new on-chip voltage converter for submicrometer high-density DRAMs
    • T. Furuyama, 'A new on-chip voltage converter for submicrometer high-density DRAMs', IEEE J. Solid-State Circuits, 22, 437-442, 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.22 , pp. 437-442
    • Furuyama, T.1
  • 14
    • 0027986390 scopus 로고
    • A comparison of two micromachined inductors (bar-type and meander-type) for fully integrated boost dc/dc power converters
    • IEEE
    • C. H. Ahn and M. G. Allen, 'A comparison of two micromachined inductors (bar-type and meander-type) for fully integrated boost dc/dc power converters', in Applied Power Electronics Conference, 10-16, IEEE, 1994.
    • (1994) Applied Power Electronics Conference , pp. 10-16
    • Ahn, C.H.1    Allen, M.G.2
  • 15
    • 0029271612 scopus 로고
    • A versatile half-micron complementary BiCMOS technology for microprocessor-based smart power applications
    • P. G. Y. Tsui, P. V. Gilbert and S. -W. Sun, 'A versatile half-micron complementary BiCMOS technology for microprocessor-based smart power applications', IEEE Trans. Electron Devices, 42, 564-570, 1995.
    • (1995) IEEE Trans. Electron Devices , vol.42 , pp. 564-570
    • Tsui, P.G.Y.1    Gilbert, P.V.2    Sun, S.-W.3
  • 16
    • 0024123630 scopus 로고
    • A simulation model for electromigration in fine-line metallization of integraterd circuits due to repetitive pulsed currents
    • J. W. Harrison, 'A simulation model for electromigration in fine-line metallization of integraterd circuits due to repetitive pulsed currents', IEEE Trans. Electron Devices, 35, 2170-2179, 1988.
    • (1988) IEEE Trans. Electron Devices , vol.35 , pp. 2170-2179
    • Harrison, J.W.1
  • 17
    • 0029287726 scopus 로고
    • Electromigration-induced integration limits on the future ULSIs and the beneficial effects of low operation temperatures
    • Y. -W Yi, K. Ihara, M. Saitoh and N. Mikoshiba, 'Electromigration-induced integration limits on the future ULSIs and the beneficial effects of low operation temperatures', IEEE Trans. Electron Devices, 42, 683-687, 1995.
    • (1995) IEEE Trans. Electron Devices , vol.42 , pp. 683-687
    • Yi, Y.-W.1    Ihara, K.2    Saitoh, M.3    Mikoshiba, N.4
  • 18
    • 0024122432 scopus 로고
    • Modeling and characterization of gate oxide reliability
    • J. C. Lee, I. -C. Chen and C. Hu, 'Modeling and characterization of gate oxide reliability', IEEE Trans. Electron Devices, 35, 2268-2278, 1988.
    • (1988) IEEE Trans. Electron Devices , vol.35 , pp. 2268-2278
    • Lee, J.C.1    Chen, I.-C.2    Hu, C.3
  • 21
    • 0022223020 scopus 로고
    • Acceleration Factors for Thin Gate Oxide Stressing
    • J. W. McPherson and D. A. Baglee, 'Acceleration Factors for Thin Gate Oxide Stressing', Proc. IRPS, 1-5, 1985.
    • (1985) Proc. IRPS , pp. 1-5
    • McPherson, J.W.1    Baglee, D.A.2
  • 24
    • 0024125256 scopus 로고
    • Lateral distributin of hot-carrier-induced interface traps in MOSFETs
    • M. G. Ancona, N. S. Saks and D. McCarthy, 'Lateral distributin of hot-carrier-induced interface traps in MOSFETs', IEEE Trans. Electron Devices, 35, 2221-2228, 1988.
    • (1988) IEEE Trans. Electron Devices , vol.35 , pp. 2221-2228
    • Ancona, M.G.1    Saks, N.S.2    McCarthy, D.3
  • 25
    • 0024610729 scopus 로고
    • Model for the electric fields in LDD MOSFETs - Part ii: Field distribution on the drain side
    • M. K. Orlowski and C. Werner, 'Model for the electric fields in LDD MOSFETs - part ii: Field distribution on the drain side', IEEE Trans. Electron Devices, 36, 382-391, 1989.
    • (1989) IEEE Trans. Electron Devices , vol.36 , pp. 382-391
    • Orlowski, M.K.1    Werner, C.2
  • 27
    • 0027698638 scopus 로고
    • Anomalous hot carrier behavior for LDD p-channel transistors
    • B. Doyle and K. Mistry, 'Anomalous hot carrier behavior for LDD p-channel transistors', IEEE Electron Device Lett., 14, 536-538, 1993.
    • (1993) IEEE Electron Device Lett. , vol.14 , pp. 536-538
    • Doyle, B.1    Mistry, K.2
  • 28
    • 0026140960 scopus 로고
    • Channel hot carrier stressing of reoxidized nitrided oxide p-MOSFETs
    • G. J. Dunn and J. T. Krick, 'Channel hot carrier stressing of reoxidized nitrided oxide p-MOSFETs', IEEE Trans. Electron Devices, 38, 901-906, 1991.
    • (1991) IEEE Trans. Electron Devices , vol.38 , pp. 901-906
    • Dunn, G.J.1    Krick, J.T.2
  • 29
    • 0026821710 scopus 로고
    • New hot-carrier degradation mode and lifetime prediction method in quarter-micrometer PMOSFET
    • T. Tsuchiya, Y. Okazaki, M. Miyake and T. Kobayashi, 'New hot-carrier degradation mode and lifetime prediction method in quarter-micrometer PMOSFET', IEEE Trans. Electron Devices, 39, 404-408, 1992.
    • (1992) IEEE Trans. Electron Devices , vol.39 , pp. 404-408
    • Tsuchiya, T.1    Okazaki, Y.2    Miyake, M.3    Kobayashi, T.4
  • 30
    • 0026896291 scopus 로고
    • Design for suppression of gate-induced drain leakage in LDD MOSFETs using a quasi-two-dimensional analytical model
    • S. A. Parke, J. E. Moon, H. jen C. Wann, P. K. Ko and C. Hu, 'Design for suppression of gate-induced drain leakage in LDD MOSFETs using a quasi-two-dimensional analytical model', IEEE Trans. Electron Devices, 39, (7), 1694-1702, 1992.
    • (1992) IEEE Trans. Electron Devices , vol.39 , Issue.7 , pp. 1694-1702
    • Parke, S.A.1    Moon, J.E.2    Jen, H.3    Wann, C.4    Ko, P.K.5    Hu, C.6
  • 31
    • 0029287682 scopus 로고
    • Mechanisms of interface trap-induced drain leakage current in off-state n-MOSFETs
    • T. -E. Chang, C. Huang and T. Wang, 'Mechanisms of interface trap-induced drain leakage current in off-state n-MOSFETs', IEEE Trans. Electron Devices, 42, 738-743, 1995.
    • (1995) IEEE Trans. Electron Devices , vol.42 , pp. 738-743
    • Chang, T.-E.1    Huang, C.2    Wang, T.3
  • 33
    • 0027594079 scopus 로고
    • Future CMOS scaling and reliability
    • C. Hu, 'Future CMOS scaling and reliability', Proceedings of the IEEE, 81, 682-689, 1993.
    • (1993) Proceedings of the IEEE , vol.81 , pp. 682-689
    • Hu, C.1
  • 34
    • 0027594869 scopus 로고
    • Examination of oxide damage during high-current stress of n-MOS transistors
    • B. S. Doyle, D. B. Krakauer and K. R. Mistry, 'Examination of oxide damage during high-current stress of n-MOS transistors', IEEE Trans. Electron Devices, 40, 980-985, 1993.
    • (1993) IEEE Trans. Electron Devices , vol.40 , pp. 980-985
    • Doyle, B.S.1    Krakauer, D.B.2    Mistry, K.R.3
  • 36
    • 0025445360 scopus 로고
    • Analysis of gate-oxide thickness dependence of hot-carrier-induced degradation in thin-gate oxide nMOSFETs
    • Y. Toyoshima, H. Iwai, F. Matsuoka, H. Hayashida, K. Maeguchi and K. Kanzaki, 'Analysis of gate-oxide thickness dependence of hot-carrier-induced degradation in thin-gate oxide nMOSFETs', IEEE Trans. Electron Devices, 37, 1496-1503, 1990.
    • (1990) IEEE Trans. Electron Devices , vol.37 , pp. 1496-1503
    • Toyoshima, Y.1    Iwai, H.2    Matsuoka, F.3    Hayashida, H.4    Maeguchi, K.5    Kanzaki, K.6
  • 37
    • 0029274172 scopus 로고
    • Scaling constraints imposed by self-heating in submicron SOI MOSFETs
    • D. A. Dallmann and K. Shenai, 'Scaling constraints imposed by self-heating in submicron SOI MOSFETs', IEEE Trans. Electron Devices, 42, 489-497, 1995.
    • (1995) IEEE Trans. Electron Devices , vol.42 , pp. 489-497
    • Dallmann, D.A.1    Shenai, K.2
  • 40
    • 0026869950 scopus 로고
    • Modeling of out-put snapback characteristics in n-channel SOI MOSFETs
    • J. S. T. Huang, H. J. Chen and J. S. Kueng, 'Modeling of out-put snapback characteristics in n-channel SOI MOSFETs', IEEE Trans. Electron Devices, 39, 1170-1178, 1992.
    • (1992) IEEE Trans. Electron Devices , vol.39 , pp. 1170-1178
    • Huang, J.S.T.1    Chen, H.J.2    Kueng, J.S.3
  • 43
    • 0028549082 scopus 로고
    • The impact of device scaling on the current fluctuations in MOSFETs
    • M. -H. Tsai and T. -P. Ma, 'The impact of device scaling on the current fluctuations in MOSFETs', IEEE Trans. Electron Devices, 41, 2061-2068, 1994.
    • (1994) IEEE Trans. Electron Devices , vol.41 , pp. 2061-2068
    • Tsai, M.-H.1    Ma, T.-P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.