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Volumn 39, Issue 7, 1996, Pages 1071-1078

Measurement and modeling of thin-film accumulation-mode SOI p-MOSFET intrinsic gate capacitances

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE MEASUREMENT; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; ELECTRIC CURRENT MEASUREMENT; LINEAR INTEGRATED CIRCUITS; MATHEMATICAL MODELS; SEMICONDUCTING BORON; SILICON ON INSULATOR TECHNOLOGY; SUBSTRATES;

EID: 0030196776     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(95)00408-4     Document Type: Review
Times cited : (4)

References (15)
  • 11
    • 30244576793 scopus 로고
    • Ph.D. dissertation, U.C. Los Angeles
    • R. D. Conilogue, Ph.D. dissertation, U.C. Los Angeles (1983).
    • (1983)
    • Conilogue, R.D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.