A novel class of sorting networks

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 43, Issue 7, 1996, Pages 544-552

  Russo, Giovanni Valerio ^a   Russo, Marco ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BIPOLAR TRANSISTORS; ELECTRIC NETWORK SYNTHESIS; SORTING;

SORTING ALGORITHMS; SORTING NETWORKS;

VLSI CIRCUITS;

EID: 0030194033     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.508173     Document Type: Article

References (14)

1. H. Ahmadi and W. E. Denzel, "A survey of modern high-performanc switching techniques," IEEE J. Select. Areas Commun., vol. 7, pp 1091-1102, Sep. 1989.
2. K. E. Batcher, "Sorting networks and their applications," in Proc. I96 SJCC, AFIPS, vol. 32, 1968, pp. 307-114.
3. X. Li, G. Linoff, S. ]. Smith. C. Stantfill, and K. Theorlmg. "A practica external sort for shared disk MPPs," in Proc. Supercomput. '93, Nov 15-19, 1993, pp. 666-675 |4J F. Corbelt and I. D. Scherson. "Sorting in mesh connected multiprocessors." IEEE Trans. Parallel Distrib. Syst., vol. 3, pp. 626-632, Sep 1992.
4. Y. C. Hong and T. H. Payne, "Parallel sorting in a ring network o processors," IEEE Trans. Compui.. vol. 38, pp. 458-64, Mar. 1989.
5. W. L. Hightower, J. F. Prins, and J. H. Reif, "Implementations o randomized sorting on large parallel machines," in Proc. 4th ACM Symp Parallel Algorithms and Architectures, July 1992, pp. 158-167, Sa Diego. CA.
6. H. M. Alnuwciri and V. K. Prasanna Kumar, "Optimal VLSI sortin with reduced number of processors,'' IEEE Trims. Compul., vol. 40, pp 105-110., Jan. 1991.
7. Q. P. üu and J. Gu, "Algorithms and average time bounds of sorting o a mesh-connected computer," IEEE Trans. Parallel Disirih. Syst., vol 5, pp. 308-315., Mar. 1994. 19] A. Louri, J. A. Hatch, and J. Na, "'A constant-time parallel sortin algorithm and its optical implementation." IEEE Micro, pp. 60 71, Jun 1995.
8. D. C. Van Voorhis, "An economical construction for sorting networks, in Proc. AFIPS NCC, 1974. pp. 921-927.
9. J. Sun, E. Cerny, and J. Gecsei, "Fault tolerance in a class of sortin networks," IEEE frans. Compul., vol. 43. pp. 827-837, July 1994.
10. J. Wang, "Analysis and design of an analog sorting network," IEEE Trans. Neural Networks, vol. 6, pp. 962-971, July 1995
11. Y. Takefui and K. Lee, "A super-parallel sorting algorithm based on neural networks," IEEE Trans. Circuits Syst., vol. 37, pp. 1425-1429, Nov. 1990
12. J. Wang, "Analysis and design of a recurrent neural network for linear programming," IEEE Trans. Circuits Syst. I, vol. 40, pp. 613-618, Sep. 1993 fl5] T. Miki, H. Matsumoto, K. Ohto, and T. Yamakawa, "Silicon implementation for a novel high-speed fuzzy inference engine: Mega-flips analog fuzzy ptocessor," J. Intelligent Fuzzy Syst., vol. 1 no. I, 1993, pp. 272
13. V. Catania, A. Puliafito, M. Russo. and L. Vita, "A VLSI fuzzy inference processor based on a discrete analog approach," IEEE Trans. Fuzzy Syst.. vol. 2, pp. 93-106. May 1994
14. P. R. Gray and R. G. Meyer, Circuin intégrait analogici. second ed. Milan, Italy: McGraw-Hill, 1994. p. 281.