ESD issues for advanced CMOS technologies

Microelectronics Reliability

Volumn 36, Issue 7-8 SPEC. ISS., 1996, Pages 907-924

  Duvvury, Charvaka ^a   Amerasekera, Ajith ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC DISCHARGES; ELECTROSTATICS; GATES (TRANSISTOR); MOS DEVICES; OXIDES; PERFORMANCE; PROCESS ENGINEERING; PROTECTION; RELIABILITY;

CMOS TECHNOLOGY; ELECTROSTATIC DISCHARGE; HUMAN BODY MODEL STRESS; PROTECTION DESIGN;

INTEGRATED CIRCUIT LAYOUT;

EID: 0030189655     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/0026-2714(96)00024-8     Document Type: Review

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