Design and self-test for switched-current building blocks

IEEE Design and Test of Computers

Volumn 13, Issue 2, 1996, Pages 10-17

  Olbrich, Thomas ^a,b,c,d,e,h   Richardson, Andrew ^a,d,e,f,g  

^a LANCASTER UNIVERSITY   (United Kingdom)

^b TECHNISCHE HOCHSCHULE MITTELHESSEN   (Germany)

^c UNIVERSITY OF CENTRAL LANCASHIRE   (United Kingdom)

^d IEEE

^e IEEE ^*

^f MANCHESTER UNIVERSITY   (United States)

^g EPSRC College of Peers

^h LANCASTER UNIVERSITY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; DIGITAL SIGNAL PROCESSING; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; VLSI CIRCUITS;

BUILT IN SELF TEST (BIST); DIVIDE BY TWO CIRCUITS; MIXED SIGNAL CIRCUITS; SWITCHED CURRENT BUILDING BLOCKS; SWITCHED CURRENT MEMORY CELLS;

DIGITAL STORAGE;

EID: 0030170035     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.500196     Document Type: Article

References (9)

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