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Volumn 13, Issue 2, 1996, Pages 34-41

Real-time current testing for A/D converters

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; INTEGRATED CIRCUIT TESTING; REAL TIME SYSTEMS;

EID: 0030169450     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.500199     Document Type: Article
Times cited : (10)

References (12)
  • 1
    • 0024666035 scopus 로고
    • Analog/Digital ASIC Design for Testability
    • May
    • P.P. Fasang, "Analog/Digital ASIC Design for Testability," IEEE Trans. Industrial Electronics, Vol. 36, No. 2, May 1989, pp. 219-226
    • (1989) IEEE Trans. Industrial Electronics , vol.36 , Issue.2 , pp. 219-226
    • Fasang, P.P.1
  • 2
    • 0013225260 scopus 로고
    • A Steady-State Response Test Generation for Mixed-Signal Integrated Circuits
    • IEEE Computer Society Press, Los Alamitos, Calif.
    • A.F. Alani, G. Musgrave, and A.P. Ambler, "A Steady-State Response Test Generation for Mixed-Signal Integrated Circuits," Proc. Int'l Test Conf., IEEE Computer Society Press, Los Alamitos, Calif., 1992, pp. 415-421.
    • (1992) Proc. Int'l Test Conf. , pp. 415-421
    • Alani, A.F.1    Musgrave, G.2    Ambler, A.P.3
  • 4
    • 0026618406 scopus 로고
    • Linear Error Modeling of Analog and Mixed-Signal Devices
    • IEEE CS Press
    • G.N. Stenbakken and T.M. Souders, "Linear Error Modeling of Analog and Mixed-Signal Devices," Proc. Int'l Test Conf., IEEE CS Press, 1991, pp. 573-581.
    • (1991) Proc. Int'l Test Conf. , pp. 573-581
    • Stenbakken, G.N.1    Souders, T.M.2
  • 6
    • 0002238418 scopus 로고
    • Circuit Design for Built-in Current Testing
    • IEEE CS Press
    • Y. Miura and K. Kinoshita, "Circuit Design for Built-in Current Testing," Proc. Int'l Test Conf., IEEE CS Press, 1992, pp. 873-881.
    • (1992) Proc. Int'l Test Conf. , pp. 873-881
    • Miura, Y.1    Kinoshita, K.2
  • 7
    • 0028723079 scopus 로고
    • DDQ Test Circuit Utilizing Upper and Lower Limits
    • IEEE CS Press
    • DDQ Test Circuit Utilizing Upper and Lower Limits," Proc. Asian Test Symp., IEEE CS Press, 1994, pp. 138-143.
    • (1994) Proc. Asian Test Symp. , pp. 138-143
    • Miura, Y.1    Naito, S.2
  • 9
    • 0027833787 scopus 로고
    • DD Pulse Response Testing of Analog and Digital CMOS Circuits
    • IEEE CS Press
    • DD Pulse Response Testing of Analog and Digital CMOS Circuits," Proc. Int'l Test Conf., IEEE CS Press, 1993, pp. 626-634.
    • (1993) Proc. Int'l Test Conf. , pp. 626-634
    • Beasley, J.S.1
  • 10
    • 0028706741 scopus 로고
    • Fault Detection and Input Stimulus Determination for the Testing of Analog Integrated Circuits Based on Power-Supply Current Monitoring
    • IEEE CS Press
    • G. Gielen, Z. Wang, and W. Sansen, "Fault Detection and Input Stimulus Determination for the Testing of Analog Integrated Circuits Based on Power-Supply Current Monitoring," Proc. Int'l Conf. Computer-Aided Design, IEEE CS Press, 1994, pp. 495-498.
    • (1994) Proc. Int'l Conf. Computer-Aided Design , pp. 495-498
    • Gielen, G.1    Wang, Z.2    Sansen, W.3
  • 11
    • 0027808270 scopus 로고
    • Very-Low-Voltage Testing for Weak CMOS Logic ICs
    • IEEE CS Press
    • H. Hao and E.J. McCluskey, "Very-Low-Voltage Testing for Weak CMOS Logic ICs," Proc. Int'l Test Conf., IEEE CS Press, 1993, pp. 275-284.
    • (1993) Proc. Int'l Test Conf. , pp. 275-284
    • Hao, H.1    McCluskey, E.J.2
  • 12
    • 0344921862 scopus 로고
    • Variable Supply Voltage Testing for Analogue CMOS and Bipolar Circuits
    • IEEE CS Press
    • E. Bruls, "Variable Supply Voltage Testing for Analogue CMOS and Bipolar Circuits," Proc. Int'l Test Conf., IEEE CS Press, 1994, pp. 562-571.
    • (1994) Proc. Int'l Test Conf. , pp. 562-571
    • Bruls, E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.