Transforming set data types to power optimal data structures

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 15, Issue 6, 1996, Pages 619-629

  Wuytack, Sven ^a   Catthoor, Francky V M ^a   De Man, Hugo J ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; DATA STRUCTURES; ELECTRIC POWER SUPPLIES TO APPARATUS; NETWORK COMPONENTS; OPTIMIZATION;

MEMORY ORGANIZATIONS; POWER CONSUMPTION; SET DATA TYPES; SYSTEM LEVEL SPECIFICATION;

SYSTEMS ANALYSIS;

EID: 0030169056     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.503932     Document Type: Article

References (20)

1. J.-Y. LeBoudec, "The asynchronous transfer mode: A tutorial," Computer Networks ISDN Syst. 24, vol. 24, pp. 279-309, 1992.
2. Y. Therasse, G.H. Petit, and M. Delvaux, "VLSI architecture of a SMDS/ATM router," Ann. Télécommun., vol. 48, no. 3/4, pp. 166-180, 1993.
3. F. Catthoor, F. Franssen, S. Wuytack, L. Nachtergaele, and H. De Man, "Global communication and memory optimizing transformations for low-power signal processing systems," in VLSI Signal Processing VII, J. Rabaey, P. Chau.J. Eldon, Eds. New York: IEEE, 1994, pp. 178-187.
4. S. Wuytack.F. Catthoor, F. Franssen, L. Nachlergaele, and H. De Man, "Global communication and memory optimizing transformations for low power systems," in Proc. Int. Workshop Low Power Design, Napa Valley. CA, Apr. 1994, pp. 203-208.
5. A.V. Aho. J. E. Hopcroft, and J. D. Ullman, Data Structures and Algorithms. Reading, MA: Addison-Wcslcy. 1983.
6. D. Singh, J. Rabaey, M. Pcdram, F. Catthoor, S. Rajgopal, N. Sehgal, and T. Mozdzen, "Power conscious CAD tools and methodologies: A perspective," P roc. IEEE, vol. 83, pp. 570-594, Apr. 1995.
7. A. Chandrakasan, M. Potkonjak, J. Rabaey, and R.W. Brodersen, "An approach for power minimization using transformations," in VLSI Signal Processing, K. Yao. R. Jain, W. Przytula, Eds. New York: IEEE, 1992.
8. A. Chandrakasan, M. Potkonjak, J. Rabaey, R. Mehru, and R.W. Brodersen, "Optimizing power using transformations," IEEE Trans. Computer-Aided Design, vol. 14, pp. 12-31, Jan. 1995.
9. T. Noll, "Low-power strategies for high-performance CMOS circuits," in Pmc. ESSCIRC, 1994, pp. 72-83.
10. P. Landman and J. Rabaey, "Power estimation for high-level synthesis," in Proc. 4lh ACM/IEEE Europ. Design Automation Conf., Paris, France, Feb. 1993, pp. 361-366.
11. _, "Black-box capacitance models for architectural power analysis," in Proc. Int. Workshop Low Power Design, Napa Valley, CA, Apr. 1994. pp. 165-170.
12. T. Meng, B. Gordon, E. Tsern, and A. Hung, "Portable video-on-demand in wireless communication," Proc. IEEE, vol. 83, pp. 659-680, Apr. 1995.
13. V. Tiwari, S. Malik, and A. Wolfe, "Power analysis of embedded software: A first step toward software power minimization," IEEE Trans. VLSI Syst., vol. 2, pp. 437-445, Dec. 1994.
14. J. Bunda, W. Athas, and D. Fussell, "Evaluating power implications of CMOS microprocessor design decisions," in Proc. Int. Workshop Low Power Design, Napa Valley, CA. Apr. 1994, pp. 147-152.
15. U. Ko.A. K. Nanda, and P. T. Balsara, "Energy optimization of multilevel processor cache architectures," in Proc. Int. Symp. Low Power Design, Laguna, CA, Apr. 1995, pp. 45-50.
16. R. Panwar and D. Rennels, "Reducing the frequency of tag compares for low-power I-cache design," in Proc. Int. Symp. Low Power Design, Laguna, CA, Apr. 1995, pp. 57-62.
17. C-L. Su and A.M. Despain, "Cache design trade-offs for power and performance optimization: A case study," in Proc. Int. Svmp. Low Power Design, Laguna, CA, Apr. 1995, pp. 63-68.
18. K. Itoh, K. Sasaki, and Y. Nakagome. 'Trends in low-power RAM circuit technologies," Proc. IEEE, vol. 83, pp. 524-543, Apr. 1995.
19. Bellcore, "Genetic system requirements in support of switched multimegabit data service," Morristown, NJ, no. 1, Tech. Rep. TR-TSV-0007772, May 1992.
20. E. Sykas, K. Vlakos.K. Tsoukatos, and E. Protonotarius, "Performance evaluation of analytical models for effective bandwidth allocation in ATM networks," Euro. Trans. Telecommun., vol. 5, no. 3, pp. 391-396, May 1994.