A fast-settling 3 v CMOS buffer amplifier

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 43, Issue 6, 1996, Pages 433-437

  Gradinariu, Lulian ^a   Gontrand, Christian ^a  

^a UNIVERSITÉ DE LYON   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC POWER SUPPLIES TO APPARATUS; OPERATIONAL AMPLIFIERS;

BIASING CIRCUIT; COMMON MODE REJECTION RATIO; POWER CONSUMPTION; QUIESCENT CURRENT; SETTLING TIME; SLEW RATE LIMITATION;

BUFFER AMPLIFIERS;

EID: 0030168997     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.503251     Document Type: Article

References (10)

1. J. F. Duque-Carrillo, R. Perez-Aloe, and J. M. Valverde, Biasing circuit for high input swing operational amplifiers, vol. 30, no. 2, Feb. 1995.
2. R. Hogervorst, J. P. Tero, R. G. H. Eschauzicr. and J. H. Huisjing, A compact power-efficient 3 V CMOS rail-to-rail input/output op amp tor VLSI cell libraries, IEEE J. Solid-Slate Circuits, vol. 29, pp. 1505-1513, Dec. 1994.
3. W. C. S. Wu, Digital-compatible high-performance operational amplifier with rail-to-rail input and output ranges, IEEE J. Solid-State Circuits, vol. 29, pp. 63-fi6, Jan. 1994.
4. M. G. Degrauwe and W. Sansen, Novel adaptive biasing amplifier, Electron. Lett., vol. 19 no. 3, pp. 92-93, Feb. 1983.
5. L. Callawert and W. Sansen, Class AB CMOS amplifiers with high efficiency, IEEE J. Solid-State Circuits, vol. 25, pp. 684-691, June 1990.
6. R. Castello and P. R. Gray, A high-performance micropower switchedcapacitor filter, IEEE J. Salid-Siate Circuits, vol. 20, pp. 1122-1132. Dec. 1985.
7. T. S. Fiez, H. C. Yang. J. J. Yang, C. Yu, and D. J. Allstot, A family of high swing CMOS operational amplifiers, IEEE J. Solid-Stale Circuits, vol. 24. pp. 1683-1687, Dec. 1989.
8. R. G. H. Eschauzier, R. Hogervorst, and J. H. Huisjing, A programmable 1.5-V CMOS class-AB operational amplifier with hybrid nested Miller compensation for 120 dB gain and 6 MHz UGF, IEEE J. Solid-State Circuits, vol. 29, pp. 1497-1504, Dec. 1994.
9. B. K. Ahuja, An improved frequency compensation technique for CMOS operational amplifiers, 1EEEJ. Solid-Stale Circuits, vol. SC-18, pp. 629-633, Dec. 1983.
10. M. D. Pardoen and M. G. Degrauwe, A rail-to-rail input/output CMOS power amplifier, IEEE J, Solid-State Circuits, vol. 25, pp. 501-504, Apr. 1990.