Parallel DSP algorithms on TurboNet: An experimental system with hybrid message-passing/shared-memory architecture

Concurrency Practice and Experience

Volumn 8, Issue 5, 1996, Pages 387-411

  Li, Xi ^a   Ziavras, Sotirios G ^a   Manikopoulos, Constantine N ^a  

^a NEW JERSEY INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DATA COMMUNICATION SYSTEMS; DATA STORAGE EQUIPMENT; DIGITAL SIGNAL PROCESSING; DISTRIBUTED COMPUTER SYSTEMS; PARALLEL PROCESSING SYSTEMS; PERFORMANCE;

HYBRID MESSAGE PASSING SHARED MEMORY ARCHITECTURE; PERFORMANCE ANALYSIS; TURBONET SYSTEMS;

PARALLEL ALGORITHMS;

EID: 0030168393     PISSN: 10403108     EISSN: None     Source Type: Journal    
DOI: 10.1002/(SICI)1096-9128(199606)8:5<387::AID-CPE223>3.0.CO;2-I     Document Type: Article

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