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Volumn 17, Issue 6, 1996, Pages 294-296

Dual MOS Gate Controlled Thyristor (DMGCT) structure with short-circuit withstand capability superior to IGBT

Author keywords

[No Author keywords available]

Indexed keywords

ANODES; BIPOLAR TRANSISTORS; CATHODES; CURRENT VOLTAGE CHARACTERISTICS; ELECTRODES; GATES (TRANSISTOR); MOSFET DEVICES; SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0030166533     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.496462     Document Type: Article
Times cited : (7)

References (10)
  • 2
    • 0022957812 scopus 로고
    • Effect of temperature and load on MCT turn-off capability
    • V. A. K. Temple and W. Tantraporn, "Effect of temperature and load on MCT turn-off capability," IEDM Digest, pp. 118-121, 1984.
    • (1984) IEDM Digest , pp. 118-121
    • Temple, V.A.K.1    Tantraporn, W.2
  • 4
    • 0029191690 scopus 로고
    • 1200 V 150 V insulated-gate thyristors
    • May
    • J. S. Ajit and D. M. Kinzer, "1200 V 150 V insulated-gate thyristors," Proc. ISPSD, May 1995, pp. 34-39.
    • (1995) Proc. ISPSD , pp. 34-39
    • Ajit, J.S.1    Kinzer, D.M.2
  • 6
    • 0029178889 scopus 로고
    • New MOS-gate controlled thyristor (MGCT)
    • May
    • J. S. Ajit and D. M. Kinzer, "New MOS-gate controlled thyristor (MGCT)," Proc. ISPSD, May 1995, pp. 123-128.
    • (1995) Proc. ISPSD , pp. 123-128
    • Ajit, J.S.1    Kinzer, D.M.2
  • 7
    • 0025578486 scopus 로고
    • High density dual-active-device-layer (DUAL) - CMOS structure with vertical tungsten plug-in wirings
    • K. Oyama, T. Kunio, R. Koh, Y. Hayashi, K. Kajiyana, and K. Tsunenari, "High density dual-active-device-layer (DUAL) - CMOS structure with vertical tungsten plug-in wirings," IEDM Dig., pp. 51-54, 1990.
    • (1990) IEDM Dig. , pp. 51-54
    • Oyama, K.1    Kunio, T.2    Koh, R.3    Hayashi, Y.4    Kajiyana, K.5    Tsunenari, K.6
  • 9
    • 84989419737 scopus 로고
    • A quarter-micron planarized interconnection technology with self-aligned plug
    • K. Ueno, K. Ohto, K. Tsunenari, K. Kajiyana, K. Kikuta, and T. Kikkawa, "A quarter-micron planarized interconnection technology with self-aligned plug," IEDM Dig., pp. 305-308, 1992
    • (1992) IEDM Dig. , pp. 305-308
    • Ueno, K.1    Ohto, K.2    Tsunenari, K.3    Kajiyana, K.4    Kikuta, K.5    Kikkawa, T.6
  • 10
    • 4243091495 scopus 로고    scopus 로고
    • High voltage current saturation in MOS gate controlled thyristors
    • to be published
    • J. S. Ajit, "High voltage current saturation in MOS gate controlled thyristors," IEEE Electron Device Lett., to be published.
    • IEEE Electron Device Lett.
    • Ajit, J.S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.