Detailed analysis and electrical modeling of gate oxide shorts in MOS transistors

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 8, Issue 3, 1996, Pages 229-239

  Segura, J ^a   De Benito, C ^a   Rubio, A ^a   Hawkins, C F ^a  

^a UNIVERSITAT DE LES ILLES BALEARS   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DEFECTS; GATES (TRANSISTOR); MATHEMATICAL MODELS; MOSFET DEVICES; SEMICONDUCTOR DOPING;

ELECTRICAL MODELING; FAULT MODELING; GATE OXIDE SHORTS; PHYSICAL DEFECTS;

INTEGRATED CIRCUIT TESTING;

EID: 0030166437     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF00133386     Document Type: Article

References (16)