Performance of CMOS differential circuits

IEEE Journal of Solid-State Circuits

Volumn 31, Issue 6, 1996, Pages 841-846

  Ng, Pius ^a   Balsara, Poras T ^b   Steiss, Don ^a  

^a TEXAS INSTRUMENTS   (United States)

^b The University of Texas at Dallas   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENT DISTRIBUTION; ELECTRIC NETWORK ANALYSIS; HAZARDS AND RACE CONDITIONS; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; SEMICONDUCTOR DEVICE STRUCTURES;

CMOS DIFFERENTIAL CIRCUITS; DYNAMIC DIFFERENTIAL CIRCUIT TECHNIQUES; SELF TIMED CHARACTERISTICS;

CMOS INTEGRATED CIRCUITS;

EID: 0030166181     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.509871     Document Type: Article

References (10)

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