-
1
-
-
0026387061
-
Edge effect prediction in real MOS insulator using test chips
-
J.Yugami and A. Hiraiwa,"Edge effect prediction in real MOS insulator using test chips," in Proc. ICMTS, vol. 4, no. 1, 1991, p. 17.
-
(1991)
Proc. ICMTS
, vol.4
, Issue.1
, pp. 17
-
-
Yugami, J.1
Hiraiwa, A.2
-
2
-
-
0025577128
-
Enhanced degradation of oxide breakdown in the peripheral region by metallic contamination
-
H. Uchida, I. Aikawa, N. Hirashita, and T. Ajioka, "Enhanced degradation of oxide breakdown in the peripheral region by metallic contamination," IEDM Tech. Dig., p. 405, 1990.
-
(1990)
IEDM Tech. Dig.
, pp. 405
-
-
Uchida, H.1
Aikawa, I.2
Hirashita, N.3
Ajioka, T.4
-
3
-
-
0028399592
-
Evaluation of plasma damage to gate oxide
-
Y. Uraoka, K. Eriguchi, T. Tamaki, and K. Tsuji, "Evaluation of plasma damage to gate oxide," IEICE Trans. Electron., vol. E77-C, no. 3, p. 453, 1994.
-
(1994)
IEICE Trans. Electron.
, vol.E77-C
, Issue.3
, pp. 453
-
-
Uraoka, Y.1
Eriguchi, K.2
Tamaki, T.3
Tsuji, K.4
-
4
-
-
21544470315
-
Electrical characteristics of ultrathin oxynitride gate dielectric prepared by rapid thermal oxidation of Si in N2O
-
H. Hwang, W. Ting, B. Maiti, D. L. Kwong, and J. Lee, "Electrical characteristics of ultrathin oxynitride gate dielectric prepared by rapid thermal oxidation of Si in N2O," Appl. Phys. Lett., vol. 57, p. 1010, 1990.
-
(1990)
Appl. Phys. Lett.
, vol.57
, pp. 1010
-
-
Hwang, H.1
Ting, W.2
Maiti, B.3
Kwong, D.L.4
Lee, J.5
-
5
-
-
0001615973
-
2O
-
2O," Appl. phys. Lett., vol. 63, p. 194, 1993.
-
(1993)
Appl. Phys. Lett.
, vol.63
, pp. 194
-
-
Okada, Y.1
Tobin, P.J.2
Lakhotia, V.3
Feil, W.A.4
Ajuria, S.A.5
Hegde, R.I.6
-
6
-
-
0025661008
-
Framed mask poly buffered LOCOS isolation for submicron VLSI technology
-
The Electrochemical Society
-
B-Y. Nguyen, P. Tobin, M. Lien, M. Woo, J. Leiss, and J. Hayden, "Framed mask poly buffered LOCOS isolation for submicron VLSI technology," in Proc. Sixth Int. Symp. Silicon Mater. Sci.Tech., The Electrochemical Society, vol. 90-7, 1990, p. 835.
-
(1990)
Proc. Sixth Int. Symp. Silicon Mater. Sci.Tech.
, vol.7-90
, pp. 835
-
-
Nguyen, B.-Y.1
Tobin, P.2
Lien, M.3
Woo, M.4
Leiss, J.5
Hayden, J.6
-
7
-
-
0028594129
-
Gate oxynitride grown in nitric oxide (NO)
-
Y. Okada, P. J. Tobin, K. G. Reid, R. I. Hegde, B. Maiti, and S. A. Ajuria, "Gate oxynitride grown in nitric oxide (NO)," Symp. VLSI Technol., p. 106, 1994.
-
(1994)
Symp. VLSI Technol.
, pp. 106
-
-
Okada, Y.1
Tobin, P.J.2
Reid, K.G.3
Hegde, R.I.4
Maiti, B.5
Ajuria, S.A.6
-
8
-
-
0028515770
-
Gate oxynitride grown in nitric oxide (NO), "Furnace grown gate oxynitride using nitric oxide (NO)
-
_. "Gate oxynitride grown in nitric oxide (NO), "Furnace grown gate oxynitride using nitric oxide (NO)," IEEE Trans. Electron Devices. vol. ED-41, p. 1608, 1994.
-
(1994)
IEEE Trans. Electron Devices
, vol.ED-41
, pp. 1608
-
-
-
9
-
-
36449009207
-
Growth and surface chemistry of oxynitride gate dielectric using nitric oxide
-
R.I. Hegde, P.J. Tobin, K.G. Reid, B. Maiti, and S.A. Ajuria, "Growth and surface chemistry of oxynitride gate dielectric using nitric oxide," Appl. Phys. Lett., vol. 66, no. 21, p. 2882, 1995.
-
(1995)
Appl. Phys. Lett.
, vol.66
, Issue.21
, pp. 2882
-
-
Hegde, R.I.1
Tobin, P.J.2
Reid, K.G.3
Maiti, B.4
Ajuria, S.A.5
-
10
-
-
0027680811
-
The effect of oxide charges at LOCOS isolation edges on oxide breakdown
-
H. Uchida, N. Hirashita, and T. Ajioka, "The effect of oxide charges at LOCOS isolation edges on oxide breakdown," IEEE Trans. Electron Devices. vol. 40, no. 10, p. 1818, 1993.
-
(1993)
IEEE Trans. Electron Devices
, vol.40
, Issue.10
, pp. 1818
-
-
Uchida, H.1
Hirashita, N.2
Ajioka, T.3
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