A pixel size shrinkage of amplified MOS imager with two-line mixing

IEEE Transactions on Electron Devices

Volumn 43, Issue 5, 1996, Pages 713-719

  Yamawaki, Masao ^a   Kawashima, Hiroshi ^a   Murata, Naofumi ^a   Andoh, Fumihiko ^b   Sugawara, Masayuki ^b   Fujita, Yoshihiro ^b  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

^b NHK SCIENCE AND TECHNICAL RESEARCH LABORATORIES   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; IMAGE ANALYSIS; ION IMPLANTATION; MOSFET DEVICES; PHOTODIODES; SENSITIVITY ANALYSIS; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE;

AMPLIFIED MOS IMAGE SENSOR; CHARGE HANDLING CAPACITY; CHARGE TRANSFER EFFICIENCY; FIXED PATTERN NOISE; PIXEL SIZE SHRINKAGE; SMEAR NOISE;

IMAGE SENSORS;

EID: 0030151657     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.491247     Document Type: Article

References (8)

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