Unified physical I-V model of fully depleted SOI/MOSFETs for analog/digital circuit simulation

Solid-State Electronics

Volumn 39, Issue 5, 1996, Pages 721-730

  Cheng, Yuhua ^a,b   Fjeldly, Tor A ^b  

^a NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Norway)

^b PEKING UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CALCULATIONS; COMPUTER SIMULATION; CONVERGENCE OF NUMERICAL METHODS; CURRENT VOLTAGE CHARACTERISTICS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; LINEAR INTEGRATED CIRCUITS; MATHEMATICAL MODELS; SILICON ON INSULATOR TECHNOLOGY; SIMULATORS;

CHANNEL LENGTH MODULATION; DRAIN CURRENT; DRAIN INDUCED BARRIER LOWERING; DRAIN INDUCED CONDUCTIVITY ENHANCEMENT;

MOSFET DEVICES;

EID: 0030150942     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(95)00184-0     Document Type: Article

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