A novel vertical bottom-gate polysilicon thin film transistor with self-aligned offset

IEEE Electron Device Letters

Volumn 17, Issue 5, 1996, Pages 199-201

  Lai, Chao Sung ^a   Lee, Chung Len ^a   Lei, Tan Fu ^a   Chern, Horng Nan ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; ELECTRIC VARIABLES MEASUREMENT; GATES (TRANSISTOR); LEAKAGE CURRENTS; PERFORMANCE; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SILICON WAFERS;

ACTIVE POLYSILICON FILM; SELF ALIGNED OFFSET;

THIN FILM TRANSISTORS;

EID: 0030150178     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.491828     Document Type: Article

References (9)

1. S. Ikeda, S. Hashiba, I. Kuramoto, H. Katoh, S. Ariga, T. Yamanaka, T. Hashimoto, N. Hashimoto, and S. Meguro, "A polysilicon transistor for large capacity SRAM's," IEDM Tech Dig., p. 469, 1990.
2. T. Zhao, M. Cao, K. C. Saraswat, and J. D. Plummer, "A vertical submicron polysilicon thin-film transistor using a low temperature process," IEEE Electron Device Lett., vol. 15, p. 415, 1994.
3. S. D. S. Malhi, P. K. Chatterjee, T. D. Bonifield, J. E. Leiss, D. E. Carter, R. F. Pinizzotto, and D. J. Coleman, "Edge-defined self-alignment of submicrometer overlaid devices," IEEE Electron Device Lett., vol. 5, p. 428, 1984.
4. C. T. Liu, C. H. Douglas Yu, A. K. Kornblit, and K. H. Lee, "Instructure," IEEE Trans. Electron Devices, vol. ED-39, no. 12, p. 2803, 1992.
5. K. Tanaka, H. Arai, and S. Kohda, "Characteristics of offset-structure polycrystalline-silicon thin-film transistors," IEEE Electron Device Lett., vol. 9, p. 23, 1988.
6. S. Seki, O. Kogure, and B. Tsujiyama, "Laser-recrystalized polycrystalline-Silicon thin-film transistors with low leakage current and high switching ratio," IEEE Electron Device Lett., vol. 8, p. 434, 1987.
7. I. W. Wu, A. G. Lewis, T. Y. Huang, W. B. Jackson, and A. Chiang, "Mechanism and device-to-device variation of leakage current in polysilicon thin film transistors," IEDM Tech. Dig., p. 867, 1990.
8. S. K. Madan and D. A. Antoniadis, "Leakage current mechanisms in hydrogen-passivated fine-grain polycrystalline silicon on insulator MOSFET's" IEEE Trans. Electron Devices, vol. ED-33, no. 10, p. 1518, 1986.
9. K. Tanaka, H. Arai, and S. Kohda, "Characteristics of offset-structure polycrystalline thin film transistors," IEEE Electron Device Lett., vol. 9, p. 23, 1988.