Guidelines for high-performance electronic package interconnections - Approach for strong coupling

IEEE Transactions on Components Packaging and Manufacturing Technology Part B

Volumn 19, Issue 2, 1996, Pages 372-380

  Yang, Yaochao ^a,b   Brews, John R ^a,c  

^a IEEE

^b HEWLETT PACKARD ENTERPRISE   (United States)

^c University of Arizona   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; COMPUTER SOFTWARE; CROSSTALK; ELECTRIC WIRING; INTEGRATED CIRCUIT LAYOUT; PERFORMANCE;

COUPLING; ELECTRONIC PACKAGE INTERCONNECTIONS; PACKING DENSITY; SPICE SIMULATION;

ELECTRONICS PACKAGING;

EID: 0030148775     PISSN: 10709894     EISSN: None     Source Type: Journal    
DOI: 10.1109/96.496041     Document Type: Review

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