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Volumn 32, Issue 11, 1996, Pages 997-998

NMOS current-balanced logic

Author keywords

CMOS logic circuits; Integrated circuits

Indexed keywords

DIGITAL INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC IMPEDANCE; LINEAR INTEGRATED CIRCUITS; LOGIC CIRCUITS; SWITCHING;

EID: 0030148362     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19960680     Document Type: Article
Times cited : (13)

References (3)
  • 2
    • 0027668154 scopus 로고
    • Folded source-coupled logic vs. CMOS static logic for low-noise mixed-signal ICs
    • ALLSTOT, D., CHEE, S.-W., KIAEI, S., and SHRIVASTAWA, M.: 'Folded source-coupled logic vs. CMOS static logic for low-noise mixed-signal ICs', IEEE Trans. Circuits Syst.-I, 1993, 40, (9), pp. 553-563
    • (1993) IEEE Trans. Circuits Syst.-I , vol.40 , Issue.9 , pp. 553-563
    • Allstot, D.1    Chee, S.-W.2    Kiaei, S.3    Shrivastawa, M.4
  • 3
    • 0026901344 scopus 로고
    • Synthesis techniques for CMOS folded source-coupled logic circuits
    • MASKAI, S., KIAEI, S., and ALLSTOT, D.: 'Synthesis techniques for CMOS folded source-coupled logic circuits', IEEE J. Solid-Slate Circuits, 1992, 27, (8), pp. 1157-1167
    • (1992) IEEE J. Solid-Slate Circuits , vol.27 , Issue.8 , pp. 1157-1167
    • Maskai, S.1    Kiaei, S.2    Allstot, D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.