Closed semiring connectionist network for the Bellman-Ford computation

IEE Proceedings: Computers and Digital Techniques

Volumn 143, Issue 3, 1996, Pages 189-195

  Lam, K P ^a   Tong, C W ^a  

^a CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

Bellman ford algoritlvn; Closed semirings; Comiectionist network architecture; Dynamic programming; VLSI

Indexed keywords

DYNAMIC PROGRAMMING; GRAPH THEORY; INTERCONNECTION NETWORKS; LINEAR INTEGRATED CIRCUITS; OPTIMIZATION; PROBLEM SOLVING; VLSI CIRCUITS;

ANALOG PROCESSING CIRCUITS; BELLMAN EQUATION; BELLMAN-FORD ALGORITHM; BINARY RELATION INFERENCE NETWORK; CONNECTIONIST NETWORK ARCHITECTURE;

ALGORITHMS;

EID: 0030147074     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:19960379     Document Type: Article

References (25)

1. BELLMAN, R.: 'On a routine problem', Q. Appl. Math., 1958, 16, pp. 87-90
2. FORD, L.R.: 'Network flow theory'. Technical Report P-923, Rand Corp., Santa Monica, CA, 1956
3. AHUJA, R.K., MAGNANTI, T.L., and ORLIN, J.B.: 'Network flows: theory, algorithms, and applications' (Prentice-Hall, Enalewood Cliffs. 1993.
4. ROTE, G.: 'A systolic array algorithm for the algebraic path problem, shortest paths; matrix inversion', Comput., 34, pp. 191-219
5. TAKAOKA, T., and UMEHARA, K.: 'An efficient VLSI algorithm for the all pairs shortest path problem', J. of Parallel Disirib. Compiit., 1992, 16, pp. 265-270
6. ROBERT, Y., and TRYSTRAM, D.: 'Systolic solution of the algebraic path problem', in MOORE, W., McCABE, A., and URQUHART, R., (Eds.): 'Systolic arrays', paper presented at the First International Workshop on Systolic Arrays, Oxford, 2-1 July, 1986 (Adam Hilser, Bristol, 1986) pp. 171-180
7. NUNEZ, F.J., and VALERO, M.: 'A block algorithm for the algebraic path problem and its execution on a systolic array'. Proceedings of International Conference on Systolic Arnn-s, 25-27 May 1988, pp. 265-274
8. FLOYD, R.W.: 'Alaorithm 97 - shortest path', Commun. ACM., 1962, 5, pp. 345
9. DIJKSTRA, E.W.: 'A note on two problems in connexion with graphs', Nwner. Math., 1959, 1, pp. 269-271
10. BERTSEKAS, O.P., and TSITSIKLIS, J.N.: 'Parallel and distributed computation: Numerical methods' (Prentice-Hall, Enalewood Cliffs, 1989)
11. BERTSEKAS, O.P., and GALLAGER, R.: 'Data networks' (Prentice-Hall, Enalewood Cliffs, 1992, 2nd edn.)
12. SAKOE, H., ISÖTANI, R., YOSHIDA, K., ISO, K., and WATANABE, T.: 'Speaker independent word recognition using dynamic proarammins neural networks'. Proc. IEEE ICASSP'S9, May 1989, (Glaseow,~ScotIand). pp. 29-32
13. SEDGEWICK, H.: 'Alaorithms' (Addison-Wesley, Readina, MA, 1988, 2nd edn.)
14. GOLAN, J.S.: 'The theory of semirings with applications in mathematics and theoretical computer science', (Loneman Group, Essex, 1992)
15. CORMEN, T.H., LEISERSON, C.E., and RIVEST, R.L., 'Introduction to Aleorithms', (The MIT Press, Cambridce, 1990)
16. AHO, A.V., HOPCROFT, J.E., and ULLMAN, J.D.: The desian and analysis of computer alaorithms' (Addison-Wesley, Reading, 1974)
17. CARRE, B.A.: 'Graphs and networks', (Oxford University Press, Oxford, 1979)
18. LAM, K.P., and SU, C.J.: 'On a binary relation inference network'. Proc. IEEE 5th Int. parallel processing sYinp., Anaheim, CA, USA, 1991, pp. 250-255
19. SU, C.J.: 'A binary relation inference network for constrained optimization'. PhD thesis, University of British Columbia. 1992
20. TONG, C.W., and LAM, K.P.: 'Analog implementations of a binary relation inference network for minimum cost path problems'. Proc. IEEE International Conference on Neural Networks, San Francisco, CA, 1993, pp. 1081-10S5
21. KRUSKAL, J.B.: 'On the shortest spanning subtree of a graph and the travellina salesman problem', Proc. Am. Math. Soc., 1956, 7, pp. 48-50"
22. PRIM, R.C.: 'Shortest connection networks and some ceneralisations', Dell Srst. Tech. J., 1957, 36, pp. 1389-1401
23. TONG, C.W'., and LAM, K.P.: 'VLSI implementation of binary relation inference network in solving shortest path problems'. To be published in Proceedings of IEEE International Conference on Neural Networks, Orlando, FL, 1994
24. ALLEN, P.E., and HOLDBERG, D.R., 'CMOS Analoa Circuit Design', (Holt, Rinehart and Winston, New York, 1987)"
25. MEAD, C.: 'Analog VLSI and neural systems', (Addison-Wesley, Reading. 1989)