A practical hardware architecture to support software acceleration

Microprocessors and Microsystems

Volumn 20, Issue 3 SPEC. ISS., 1996, Pages 167-174

  Edwards, Martyn ^a   Forrest, John ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

Computer systems architecture; Hardware software codesign; High level synthesis; Performance optimisation

Indexed keywords

COMPUTER HARDWARE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SOFTWARE; COMPUTER SYSTEMS; COMPUTER SYSTEMS PROGRAMMING; GENERAL PURPOSE COMPUTERS; HIGH LEVEL LANGUAGES; MICROCOMPUTERS; OPTIMIZATION; PERFORMANCE; SYSTEMS ANALYSIS; SYSTEMS ENGINEERING;

COSYNTHESIS; HIGH LEVEL SYNTHESIS; MICROCONTROLLER; PROGRAMMABLE HARDWARE; SOFTWARE ACCELERATION;

COMPUTER ARCHITECTURE;

EID: 0030144341     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/0141-9331(95)01074-2     Document Type: Article

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