Scalable parallel 3D finite element nonlinear Poisson solver

Simulation Practice and Theory

Volumn 4, Issue 2-3 SPEC. ISS., 1996, Pages 155-168

  Asenov, A ^a   Barker, J R ^a   Brown, A R ^a   Lee, G L ^a  

^a UNIVERSITY OF GLASGOW   (United Kingdom)

Author keywords

Nanostructures; Parallel Poisson solver; Processor array; Semiconductor devices

Indexed keywords

COMPUTER SIMULATION; FINITE ELEMENT METHOD; NANOSTRUCTURED MATERIALS; PARALLEL PROCESSING SYSTEMS;

PARALLEL POISSON SOLVER; PROCESSOR ARRAYS;

SEMICONDUCTOR DEVICE MODELS;

EID: 0030143055     PISSN: 09284869     EISSN: None     Source Type: Journal    
DOI: 10.1016/0928-4869(95)00025-9     Document Type: Article

References (20)

1. A. Asenov, D. Reid, J.R. Barker, N. Cameron and S.P. Beaumont, Finite element simulation of recess gate MESFETs and HEMTs: The simulator H2F, in: S. Selberherr, H. Stippel and E. Strasser, eds., Simulation of Semiconductor Devices and Processes (Springer, Wien, 1993) 265-268.
2. A. Asenov, D. Reid, A. Brown and J.R. Barker, The implementation and speed-up of coloured SOR methods solving 3D problems on array of transputers, in: R. Grabe et al., eds., Transputer Applications and Systems '93, (IOS Press, Amsterdam, 1993) 578.
3. A. Asenov, D. Reid and J.R. Barker, Speed-up of scalable iterative linear solvers implemented on an array of transputers, Parallel Computing 20 (1994) 375-387.
4. S. Babiker, J.R. Barker and A. Asenov, Queuing-theoretic simulation of single-electronic metal-semiconductor devices and systems, in: Proceedings of the International Workshop on Computational Electronics (Leeds University Press, Leeds, 1993) 260-264.
5. A.R. Brown, A. Asenov, J.R. Barker, S. Jones and P. Waind, Numerical simulation of IGBTa at elevated temperatures, in: Proceedings of the International Workshop on Computational Electronics (Leeds University Press, Leeds, 1993) 50-54.
6. A. Brown, D. Reid, A. Asenov and J.R. Barker, The implementation and speed-up of coloured SOR methods for solving the 3D Poisson equation on an array of transputers, in: Proceedings of the International Workshop on Computational Electronics (Leeds University Press, Leeds, 1993) 171-175.
7. Jr.W.T. Carter, Finite element analysis on a transputer system, in: D.L. Fielding, ed., Transputer Research and Applications, Vol. 4 (IOS Press, Amsterdam, 1990).
8. H.C. Chan and T.-J. Shien, A three-dimensional semiconductor device simulation for GaAs/ AlGaAs heterojunction bipolar transistor analysis, IEEE Trans. Electron Dev. 38 (1991) 2427-2432.
9. F.H. Chishti, A.R. Clare and M. Razaz, Transputer implementation for parallel generation and assembly of finite element systems, in: R. Grabe et al., eds., Transputer Applications and Systems '93 (IOS Press, Amsterdam, 1993) 564-577.
10. C. Farhat, A simple and efficient automatic FEM domain decomposer, Computers and Structures 28 (1988) 579-602.
11. O. Kalz and D. Schroder, PARDESIM - A parallel device simulator on a transputer based MIMD-machine, in: S. Selberherr, H. Stippel and E. Strasser, eds., Simulation of Semiconductor Devices and Processes (Springer, Wien, 1993) 245-248.
12. S. Kavadias and K. Misiakos, Three-dimensional simulation of planar semiconductor diodes, IEEE Trans. Electron Dev. 40 (1993) 1857-1878.
13. T.D. Linton, P.A. Blakery and A. Fas, General three dimensional device simulator and its application in a submicron EPROM design study, IEEE Trans. Computer-Aided Design 8 (1989) 508-515.
14. A. Reinfeld, The SEUS Consortium Massively Parallel Computing, Technical Report PS2/TR-007-93 (1993) 47.
15. S. Roy, J.R. Barker and A. Asenov, System simulation tools for single-electronic devices, in: Proceedings of the International Workshop on Computational Electronics (Leeds University Press, Leeds, 1993) 275-279.
16. C.M. Sotomayor-Torres, P.D. Wang, H. Benisty and H. Weisbuch, Luminescence and Raman scattering of GaAs-GaAlAs quantum dots, in: G. Bauer, F. Kuchar and M.H. Heinrich, eds., Novel concepts for low dimensional electronic systems (Springer, Berlin, 1992) 289-299.
17. E. Stefanov, A. Asenov, F. Koch, U. Meiners, B.E. Maile, C. Wolk and H. Brugger, The In-Plane-Gate transistor: Device simulation and design of the IPG, in: Extended Abstracts of the 1992 International Conference on Solid State Devices and Materials, Tsukuba (1992) 759-761.
18. C.S. Tsang-Ping, D.M. Barry and C.M. Snowden, Numerical simulation of a GaAs MESFET device using parallel processing techniques with adaptive meshing and dynamic load balancing on a transputer network, in: Proceedings of the International Workshop on Computational Electronics (Leeds University Press, Leeds, 1993) 166-170.
19. G.N. Yagava, N. Soneda and S. Yoshimura, A large scale finite element analysis using domain decomposition method on parallel computer, Computers and Structures 38 (1991) 615-625.
20. O.C. Zienkiewicz and K. Morgan, Finite Elements and Approximations (John Wiley & Sons, New York, 1983).