A novel 0.1 μm MOSFET structure with inverted sidewall and recessed channel

IEEE Electron Device Letters

Volumn 17, Issue 4, 1996, Pages 157-159

  Lyu, Jeongho ^a,b   Park, Byung Gook ^a,b   Chun, Kukjin ^a,b   Lee, Jong Duk ^a,b  

^a IEEE

^b Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ARSENIC; ELECTRON BEAM LITHOGRAPHY; ETCHING; GATES (TRANSISTOR); ION IMPLANTATION; OXIDATION; OXIDES; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SILICON WAFERS; TRANSCONDUCTANCE;

CHANNEL LENGTH; INVERTED SIDEWALL RECESSED CHANNEL; MAXIMUM SATURATION TRANSCONDUCTANCE; OXIDE THICKNESS; PERFORMANCE ENHANCEMENT; SHORT CHANNEL EFFECT; THRESHOLD VOLTAGE;

MOSFET DEVICES;

EID: 0030129456     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.485159     Document Type: Article

References (6)

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