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Volumn 31, Issue 4, 1996, Pages 575-584

A mixed-mode voltage down converter with impedance adjustment circuitry for low-voltage high-frequency memories

Author keywords

[No Author keywords available]

Indexed keywords

COMPARATOR CIRCUITS; DIFFERENTIAL AMPLIFIERS; ELECTRIC CONVERTERS; ELECTRIC CURRENTS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; SEMICONDUCTOR STORAGE;

EID: 0030123597     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.499735     Document Type: Article
Times cited : (9)

References (15)
  • 1
    • 0024927760 scopus 로고
    • A 1.5 V DRAM for battery-based applications
    • Feb.
    • M. Aoki et al., "A 1.5 V DRAM for battery-based applications," in ISSCC Dig. Tech. Papers, Feb. 1989, pp. 238-239.
    • (1989) ISSCC Dig. Tech. Papers , pp. 238-239
    • Aoki, M.1
  • 2
  • 3
    • 85027132884 scopus 로고
    • A 20 ns battery-operated 16 Mb CMOS DRAM
    • Feb.
    • H. Yamauchi et al., "A 20 ns battery-operated 16 Mb CMOS DRAM," in ISSCC Dig. Tech. Papers, Feb. 1989, pp. 44-45.
    • (1989) ISSCC Dig. Tech. Papers , pp. 44-45
    • Yamauchi, H.1
  • 4
    • 0027876189 scopus 로고
    • An efficient back-bias generator with hybrid pumping circuit for 1.5 V DRAM's
    • Y. Tsukikawa et al., "An efficient back-bias generator with hybrid pumping circuit for 1.5 V DRAM's," in Symp. VLSI Circuits Dig. Tech. Papers, 1993, pp. 85-86.
    • (1993) Symp. VLSI Circuits Dig. Tech. Papers , pp. 85-86
    • Tsukikawa, Y.1
  • 5
    • 0027876188 scopus 로고
    • A well synchronized sensing/equalizing method for sub-1.0 V operating advanced DRAM's
    • T. Ooishi et al., "A well synchronized sensing/equalizing method for sub-1.0 V operating advanced DRAM's," in Symp. VLSI Circuits Dig. Tech. Papers, 1993, pp. 81-82.
    • (1993) Symp. VLSI Circuits Dig. Tech. Papers , pp. 81-82
    • Ooishi, T.1
  • 6
    • 0023564293 scopus 로고
    • Voltage limiters suitable to DRAM's with substrate-plate electrode memory cells
    • T. Takeshima et al., "Voltage limiters suitable to DRAM's with substrate-plate electrode memory cells," in Symp. VLSI Circuits Dig. Tech. Papers, 1987, pp. 85-86.
    • (1987) Symp. VLSI Circuits Dig. Tech. Papers , pp. 85-86
    • Takeshima, T.1
  • 7
    • 0025536505 scopus 로고
    • A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier
    • M. Horiguchi et al., "A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier," in Symp. VLSI Circuits Dig. Tech. Papers, 1990. pp. 75-76.
    • (1990) Symp. VLSI Circuits Dig. Tech. Papers , pp. 75-76
    • Horiguchi, M.1
  • 8
    • 0026396319 scopus 로고
    • Temperature-compensation circuit techniques for high-density CMOS DRAM's
    • D.-S. Min et al., "Temperature-compensation circuit techniques for high-density CMOS DRAM's," in Symp. VLSI Circuits Dig. Tech. Papers, 1991. pp. 125-126.
    • (1991) Symp. VLSI Circuits Dig. Tech. Papers , pp. 125-126
    • Min, D.-S.1
  • 9
    • 0026370966 scopus 로고
    • Dual-regulator dual-decoding-trimmer DRAM voltage limiter for burn-in test
    • M. Horiguchi et al., "Dual-regulator dual-decoding-trimmer DRAM voltage limiter for burn-in test," in Symp. VLSI Circuits Dig. Tech. Papers, 1991, pp. 127-128.
    • (1991) Symp. VLSI Circuits Dig. Tech. Papers , pp. 127-128
    • Horiguchi, M.1
  • 10
    • 5844248661 scopus 로고
    • A new on-chip voltage regulator for high density CMOS DRAM's
    • R. S. Mao et al., "A new on-chip voltage regulator for high density CMOS DRAM's," in Symp. VLSI Circuits Dig. Tech. Papers, 1992, pp. 108-109.
    • (1992) Symp. VLSI Circuits Dig. Tech. Papers , pp. 108-109
    • Mao, R.S.1
  • 11
    • 0027813559 scopus 로고
    • Sub-1-μA dynamic reference voltage generator for battery-operated DRAM's
    • H. Tanaka et al., "Sub-1-μA dynamic reference voltage generator for battery-operated DRAM's," in Symp. VLSI Circuits Dig. Tech. Papers, 1993, pp. 87-88.
    • (1993) Symp. VLSI Circuits Dig. Tech. Papers , pp. 87-88
    • Tanaka, H.1
  • 12
    • 0029518898 scopus 로고
    • A mixed-mode voltage-down converter with impedance adjustment circuitry for low-voltage wide-frequency DRAM's
    • T. Ooishi et al.,"A mixed-mode voltage-down converter with impedance adjustment circuitry for low-voltage wide-frequency DRAM's," in Symp. VLSI Circuits Dig. Tech. Papers, 1995, pp. 111-112.
    • (1995) Symp. VLSI Circuits Dig. Tech. Papers , pp. 111-112
    • Ooishi, T.1
  • 13
    • 0024090005 scopus 로고
    • Dual-operating-voltage scheme for a single 5-V 16-Mbit DRAM
    • Oct.
    • M. Horiguchi et al., "Dual-operating-voltage scheme for a single 5-V 16-Mbit DRAM," IEEE J. Solid-State Circuits, vol. SC-23, pp. 1128-1132, Oct. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.SC-23 , pp. 1128-1132
    • Horiguchi, M.1
  • 14
    • 0017503796 scopus 로고
    • CMOS analog integrated circuits based on weak inversion operation
    • June
    • E. Vitozz et al., "CMOS analog integrated circuits based on weak inversion operation," IEEE J. Solid-State Circuits, vol. 27, pp. 224-231, June 1977.
    • (1977) IEEE J. Solid-State Circuits , vol.27 , pp. 224-231
    • Vitozz, E.1
  • 15
    • 0028608450 scopus 로고
    • An automatic temperature compensation of internal sense ground for sub-quarter micron DRAM's
    • T. Ooishi et al., "An automatic temperature compensation of internal sense ground for sub-quarter micron DRAM's," in Symp. VLSI Circuits Dig. Tech. Papers, 1994, pp. 77-78.
    • (1994) Symp. VLSI Circuits Dig. Tech. Papers , pp. 77-78
    • Ooishi, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.