Incremental layout placement modification algorithms

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 15, Issue 4, 1996, Pages 437-445

  Choy, Chiu Sing ^a,b   Cheung, Tsz Shing ^a   Wong, Kam Keung ^b  

^a CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

^b Tokyo Metropolitan University   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUITS; LOGIC GATES;

COMPUTATION TIME; INCREMENTAL LAYOUT PLACEMENT MODIFICATION;

COMPUTER AIDED DESIGN;

EID: 0030123218     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.494707     Document Type: Article

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