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Volumn 31, Issue 3, 1996, Pages 448-451

A module generator for high-speed CMOS current output digital/analog converters

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CONSTRAINT THEORY; ELECTRIC CURRENTS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; SPECIFICATIONS;

EID: 0030108395     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.494207     Document Type: Article
Times cited : (9)

References (17)
  • 1
    • 0025448791 scopus 로고
    • Analog circuit design optimization based on symbolic simulation and simulated annealing
    • June
    • G. G. E. Gielen, H. C. C. Walscharts, and W. M. C. Sansen, "Analog circuit design optimization based on symbolic simulation and simulated annealing," IEEE J. Solid-State Circuits, vol. 25, no. 3, pp. 707-713, June 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.3 , pp. 707-713
    • Gielen, G.G.E.1    Walscharts, H.C.C.2    Sansen, W.M.C.3
  • 2
  • 5
    • 0024681330 scopus 로고
    • Toward an analog system design environment
    • June
    • M. C. Degrauwe et al., "Toward an analog system design environment," IEEE J. Solid-State Circuits, vol. 24, no. 3, pp. 659-671, June 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , Issue.3 , pp. 659-671
    • Degrauwe, M.C.1
  • 7
    • 0025383839 scopus 로고
    • OPASYN: A compiler for CMOS operational amplifiers
    • Feb.
    • H. Y. Koh, C. H. Sequin, and P. R. Gray, "OPASYN: A compiler for CMOS operational amplifiers," IEEE Trans. Computer-Aided Design, vol. 9, no. 2, 113-125, Feb. 1990.
    • (1990) IEEE Trans. Computer-Aided Design , vol.9 , Issue.2 , pp. 113-125
    • Koh, H.Y.1    Sequin, C.H.2    Gray, P.R.3
  • 9
    • 4243132456 scopus 로고
    • Top-down, constraint-driven design methodology based generation of interpolative current source D/A converters
    • May
    • H. C. Chang, E. Liu, R. Neff et al., "Top-down, constraint-driven design methodology based generation of interpolative current source D/A converters," in Proc. IEEE Custom Integrated Circuits Conf., May 1994, pp. 15.5.1-15.5.4.
    • (1994) Proc. IEEE Custom Integrated Circuits Conf.
    • Chang, H.C.1    Liu, E.2    Neff, R.3
  • 10
    • 0029228502 scopus 로고
    • Top-down, constraint-driven design methodology based generation of a second order ΔΣ-A/D converter
    • May
    • H. C. Chang, E. Felt, and A. Sangiovanni-Vincentelli, "Top-down, constraint-driven design methodology based generation of a second order ΔΣ-A/D converter," in Proc. IEEE Custom Integrated Circuits Conf., May 1995, pp. 25.5.1-25.5.4.
    • (1995) Proc. IEEE Custom Integrated Circuits Conf.
    • Chang, H.C.1    Felt, E.2    Sangiovanni-Vincentelli, A.3
  • 11
    • 0023994941 scopus 로고
    • DELIGHT.SPICE: An optimization-based system for the design of integrated circuits
    • Apr.
    • W. Nye et al., "DELIGHT.SPICE: An optimization-based system for the design of integrated circuits," IEEE Trans. Computer-Aided Design, vol. 7, no. 4, pp. 501-19, Apr. 1988.
    • (1988) IEEE Trans. Computer-Aided Design , vol.7 , Issue.4 , pp. 501-519
    • Nye, W.1
  • 12
    • 0022902024 scopus 로고
    • An outer-approx. algorithm for a class of MINLP's
    • M. A. Duran and I. E. Grossmann, "An outer-approx. algorithm for a class of MINLP's," Mathematical Programming, vol. 36, pp. 307-339, 1986.
    • (1986) Mathematical Programming , vol.36 , pp. 307-339
    • Duran, M.A.1    Grossmann, I.E.2
  • 15
    • 0023586396 scopus 로고
    • A high-performance CMOS 70-MHz palette/DAC
    • Dec.
    • L. Letham, B. K. Ahuja et al., "A high-performance CMOS 70-MHz palette/DAC," IEEE J. Solid-State Circuits, vol. SC-22, no. 6, pp. 1041-47, Dec. 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , Issue.6 , pp. 1041-1047
    • Letham, L.1    Ahuja, B.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.