Optimal synthesis of algorithm-specific lower-dimensional processor arrays

IEEE Transactions on Parallel and Distributed Systems

Volumn 7, Issue 3, 1996, Pages 274-287

  Ganapathy, Kumar N ^b   Wah, Benjamin W ^a,c  

^a IEEE

^b Rockwell International   (United States)

^c University of Illinois at Urbana Champaign   (United States)

Author keywords

Design constraints; Objective function; Optimal design; Polynomial time search; Processor arrays; Transitive closure; Uniform recurrence equations

Indexed keywords

COMPUTATIONAL COMPLEXITY; LOGIC DESIGN; MATRIX ALGEBRA; OPTIMAL SYSTEMS; SYSTOLIC ARRAYS; VECTORS;

ALGORITHM SPECIFIC LOWER DIMENSIONAL PROCESSOR ARRAYS; DESIGN CONSTRAINTS; OBJECTIVE FUNCTION; POLYNOMIAL TIME SEARCH; TRANSITIVE CLOSURE; UNIFORM RECURRENCE EQUATIONS;

ALGORITHMS;

EID: 0030106788     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.491581     Document Type: Article

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