Test synthesis with alternative graphs

IEEE Design and Test of Computers

Volumn 13, Issue 1, 1996, Pages 48-57

  Ubar, Raimund ^{a,b,c,d,e,f,g}  

^a TALLINN UNIVERSITY OF TECHNOLOGY   (Estonia)

^b Moscow State Technical University   (Russian Federation)

^c IEEE

^d Gesellschaft der Informatik ^*

^e Europ Test Technol Tech Committee

^f ESTONIAN ACADEMY OF SCIENCES   (Estonia)

^g Estonian Science Foundation

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; DATA STRUCTURES; ELECTRIC NETWORK ANALYSIS; GRAPH THEORY; KNOWLEDGE REPRESENTATION; MATHEMATICAL MODELS;

ALTERNATIVE GRAPHS; TEST SYNTHESIS;

DIGITAL CIRCUITS;

EID: 0030106765     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.485782     Document Type: Article

References (16)

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