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Volumn 31, Issue 3, 1996, Pages 304-311

An 8-b, 40 Msamples/s switched-current-mode track-and-hold circuit on a BiCMOS sea-of-gates array

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BANDWIDTH; BIPOLAR TRANSISTORS; CELLULAR ARRAYS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC DISTORTION; ELECTRIC NETWORK TOPOLOGY; HARMONIC GENERATION; INTEGRATED CIRCUIT MANUFACTURE; MOSFET DEVICES; NYQUIST DIAGRAMS;

EID: 0030105548     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.494192     Document Type: Article
Times cited : (10)

References (12)
  • 1
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    • J. B. Hughes and K. W. Moulding, "Switched-current signal processing for video frequencies and beyond," IEEE J. Solid-State Circuits, vol. 28, pp. 314-322, Mar. 1993.
    • (1993) IEEE J. Solid-State Circuits , vol.28 , pp. 314-322
    • Hughes, J.B.1    Moulding, K.W.2
  • 2
    • 0343578412 scopus 로고
    • A full Nyquist 15MS/S 8-bit differential switched-current A/D converter
    • M. Bracey, W. Redman-White, J. Richardson, and J. B. Hughes, "A full Nyquist 15MS/S 8-bit differential switched-current A/D converter," in ESSCIRC Proc., 1995, pp. 146-149.
    • (1995) ESSCIRC Proc. , pp. 146-149
    • Bracey, M.1    Redman-White, W.2    Richardson, J.3    Hughes, J.B.4
  • 3
    • 0029359682 scopus 로고
    • BiCMOS circuits for high speed current mode D/A converters
    • Aug.
    • R. J. Romanczyk and B. H. Leung, "BiCMOS circuits for high speed current mode D/A converters," IEEE J. Solid-State Circuits, vol. 30, pp. 923-934, Aug. 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , pp. 923-934
    • Romanczyk, R.J.1    Leung, B.H.2
  • 4
    • 0029209676 scopus 로고
    • Precise CMOS current sample/hold circuits using differential clock feedthrough attenuation techniques
    • Jan.
    • C. Wu, C. Chen, and J. Cho, "Precise CMOS current sample/hold circuits using differential clock feedthrough attenuation techniques," IEEE J. Solid-State Circuits, vol. 30, pp. 76-80, Jan. 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , pp. 76-80
    • Wu, C.1    Chen, C.2    Cho, J.3
  • 5
    • 4243189081 scopus 로고
    • Time-interleaved sampled-and-hold S2I circuit for high-speed current-mode ADC's
    • J. P. Oliveira, A. M. Pereira, and J. E. Franca, "Time-interleaved sampled-and-hold S2I circuit for high-speed current-mode ADC's," in ESSCIRC Proc., 1994, pp. 184-187.
    • (1994) ESSCIRC Proc. , pp. 184-187
    • Oliveira, J.P.1    Pereira, A.M.2    Franca, J.E.3
  • 7
    • 0026898371 scopus 로고
    • Fully bipolar, 120-Msample/s 10-b track-and-hold circuit
    • July
    • P. Vorenkamp and J. P. M. Verdaasdonk, "Fully bipolar, 120-Msample/s 10-b track-and-hold circuit," IEEE J. Solid-State Circuits, vol. 27, pp. 988-992, July 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 988-992
    • Vorenkamp, P.1    Verdaasdonk, J.P.M.2
  • 8
    • 0028529968 scopus 로고
    • High speed BiCMOS current mode differential track-and-hold circuit
    • Oct.
    • T. Reimann, F. Krummenacher, and M. Declercq, "High speed BiCMOS current mode differential track-and-hold circuit," Electron. Lett., vol. 30, no. 21, pp. 1730-1731, Oct. 1994.
    • (1994) Electron. Lett. , vol.30 , Issue.21 , pp. 1730-1731
    • Reimann, T.1    Krummenacher, F.2    Declercq, M.3
  • 9
    • 0027211325 scopus 로고
    • A fully-complementary BiCMOS array for mixed analogue/digital applications
    • paper 23.7, May
    • M. Declercq, P. Duchene, H. Ballane, M. Grigorie, T. Reimann, and T. Baechler, "A fully-complementary BiCMOS array for mixed analogue/digital applications," presented at CICC Proc., paper 23.7, May 1993.
    • (1993) CICC Proc.
    • Declercq, M.1    Duchene, P.2    Ballane, H.3    Grigorie, M.4    Reimann, T.5    Baechler, T.6
  • 10
    • 0024681077 scopus 로고
    • A highly flexible sea-of-gates structure for digital and analogue applications
    • June
    • P. Duchene and M. Declercq, "A highly flexible sea-of-gates structure for digital and analogue applications," IEEE J. Solid-State Circuits, vol. 24, no. 3, pp. 576-584, June 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , Issue.3 , pp. 576-584
    • Duchene, P.1    Declercq, M.2
  • 11
    • 4243098138 scopus 로고    scopus 로고
    • A new CMOS mirror circuit with reduced distortion for high bandwidth applications
    • R. Balmford and W. Redman-White, "A new CMOS mirror circuit with reduced distortion for high bandwidth applications," in ECCTD '93-Circuit Theory and Design, pp. 923-927.
    • ECCTD '93-Circuit Theory and Design , pp. 923-927
    • Balmford, R.1    Redman-White, W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.