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Volumn 333, Issue 2, 1996, Pages 191-199
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The half-plane pull-in range of a second-order phase-locked loop
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
ELECTRIC RESISTANCE;
ELECTRIC RESISTANCE MEASUREMENT;
GAIN CONTROL;
MATHEMATICAL MODELS;
MULTIPLYING CIRCUITS;
PHASE COMPARATORS;
SPURIOUS SIGNAL NOISE;
TUNING;
VARIABLE FREQUENCY OSCILLATORS;
DYNAMICAL MODEL;
ERROR SIGNAL;
GALERKIN BASED ALGORITHM;
HALF PLANE PULL IN RANGE;
LOOP ANALOG MULTIPLIER;
LOOP FILTER;
MAXIMUM VALUE LOOP DETUNING;
SECOND ORDER PHASE LOCKED LOOP;
PHASE LOCKED LOOPS;
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EID: 0030100574
PISSN: 00160032
EISSN: None
Source Type: Journal
DOI: 10.1016/0016-0032(96)00010-5 Document Type: Article |
Times cited : (10)
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References (9)
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