The effect of HF processing on gate oxide degradation in aggressive poly buffered LOCOS isolation

IEEE Electron Device Letters

Volumn 17, Issue 2, 1996, Pages 50-52

  Cox, Kevin ^a,b   Chonko, Mark ^a   Honcik, Chris ^a,b   VanDyke, Shelly ^a  

^a MOTOROLA INC   (United States)

^b IEEE

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CRYSTAL DEFECTS; ELECTRIC BREAKDOWN OF SOLIDS; GATES (TRANSISTOR); INTERFACES (MATERIALS); SEMICONDUCTOR DEVICE MANUFACTURE; SURFACE ROUGHNESS;

CHARGE TO BREAKDOWN; ETCHBACK CHEMISTRY; GATE OXIDE DEGRADATION; POLY BUFFERED LOCOS ISOLATION;

MOS DEVICES;

EID: 0030087181     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.484120     Document Type: Article

References (6)

1. H. Uchida, N. Hirashita, and T. Ajioka, "The effect of oxide charges at LOCOS isolation edges on oxide breakdown," IEEE Trans. Electron Devices, vol. 40, p. 1818, 1993.
2. J. Yugmai and A. Hiraiwa, "Edge effect prediction in real MOS insulator using test chips," in Proc. ICMTS, vol. 4, no. 1, p. 17, 1991.
3. H. Uchida, I. Aikawa, N. Hirashita, and T. Ajioka, "Enhanced degradation of oxide breakdown in the peripheral region by metallic contamination," in IEDM Tech. Dig., 1990, p. 405.
4. 2 Interface 2, C. R. Helms and B. E. Deal, Eds. New York: Plenum, 1993, p. 267.
5. S. Geha, R. Guo, H. Wang, M. Slama, and K. Srikrishna, "A 7ethodology for optimizing gate oxide pre-clean," ECS Extended Abstracts, 93-1, p. 1120, 1993.
6. Tadahiro Ohmi, Masayuki Miyashita, Mitsushi Itano, Takashi Imaoka, and Ichiroh Kawanabe, "Dependence of thin-oxide films quality on surface microroughness," IEEE Trans. Electron Devices, vol. 39, no. 3, March 1992.