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Volumn 39, Issue , 1996, Pages 354-355

Dual floating point coprocessor with an FMAC architecture

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; ENCODING (SYMBOLS); LOGIC DESIGN; PIPELINE PROCESSING SYSTEMS; SIGNAL ENCODING; TIMING DEVICES;

EID: 0030086011     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (20)

References (3)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.