10 Gb/s silicon bipolar IC for PRBS testing

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 39, Issue , 1996, Pages 206-207

  Kromat, Oliver ^a   Langmann, Ulrich ^a   Hanke, Gerhard ^a   Hillery, William J ^a  

^a RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY SEQUENCES; BIPOLAR INTEGRATED CIRCUITS; BIT ERROR RATE; COUNTING CIRCUITS; DATA COMMUNICATION SYSTEMS; EMITTER COUPLED LOGIC CIRCUITS; ERROR DETECTION; MULTIPLEXING EQUIPMENT; PERFORMANCE; SEMICONDUCTING SILICON; SHIFT REGISTERS; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

BIT ERROR COUNTING; ERROR LOGIC; PSEUDO RANDOM BINARY SEQUENCE;

INTEGRATED CIRCUIT TESTING;

EID: 0030086005     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)