200Mb/s analog DFE read channel

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 39, Issue , 1996, Pages 72-73

  Sands, Nicholas P ^a   Hauser, Max W ^a   Liang, Guojin ^a   Groenewold, Gerrit ^a   Lam, Steven ^a   Lin, Chao Ho ^a   Kuklewicz, John ^a   Lang, Luke ^a   Dakshinamurthy, Raman ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE FILTERING; BIT ERROR RATE; CMOS INTEGRATED CIRCUITS; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER SIMULATION; DIGITAL FILTERS; DIGITAL SIGNAL PROCESSING; MATHEMATICAL MODELS; PHASE LOCKED LOOPS; SIGNAL DETECTION; SIGNAL TO NOISE RATIO; VARIABLE FREQUENCY OSCILLATORS;

ANALOG SIGNAL PROCESSING; DECISION FEEDBACK EQUALIZER; GAIN ERROR SIGNAL; LORENTZIAN MODEL; VARIABLE GAIN AMPLIFIER;

EQUALIZERS;

EID: 0030085917     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)