200Mb/s PRML read/write channel IC

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 39, Issue , 1996, Pages 66-67

  Parsi, K ^a   Rao, N ^a   Burns, R ^a   Chaiken, A ^a   Chambers, M ^a   Cheung, R ^a   Fomi, B ^a   Harnishfeger, D ^a   Jam, C ^a   Kaylor, S ^a   Pennell, M ^a   Perez, J ^a   Rohrbaugh, M ^a   Ross, M ^a   Stuhlmiller, G ^a   et al , ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BIPOLAR INTEGRATED CIRCUITS; BIT ERROR RATE; CMOS INTEGRATED CIRCUITS; DETECTOR CIRCUITS; DIGITAL CIRCUITS; DIVIDING CIRCUITS (ARITHMETIC); EMITTER COUPLED LOGIC CIRCUITS; MOS DEVICES; PHASE LOCKED LOOPS; SIGNAL GENERATORS;

BICMOS; PRML READ WRITE CHANNEL; SYNCHRONOUS DESIGN TECHNIQUE; TIME BASE GENERATOR; VARIABLE GAIN AMPLIFIER;

HARD DISK STORAGE;

EID: 0030085916     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)