60ns 1Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 39, Issue , 1996, Pages 368-369

  Koike, Hiroki ^a   Otsuki, Tetsuya ^a   Kimura, Tohru ^a   Fukuma, Masao ^a   Hayashi, Yoshihiro ^a   Maejima, Yukihiko ^a   Amanuma, Kazushi ^a   Tanabe, Nobuhiro ^a   Matsuki, Takeo ^a   Saito, Shinobu ^a   Takeuchi, Tsuneo ^a   Kobayashi, Souta ^a   Kunio, Takemitsu ^a   Hase, Takashi ^a   Miyasaka, Yoichi ^a   et al , ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFICATION; AMPLIFIERS (ELECTRONIC); CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; FERROELECTRIC DEVICES; MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE; SCANNING ELECTRON MICROSCOPY;

BIT LINE CAPACITANCE; DATA PROTECTION CONTROL METHOD; FERROELECTRIC CAPACITORS; MEMORY CELL CAPACITANCE; MEMORY CELL CAPACITOR; MICROGRAPH; SENSE AMPLIFIERS;

NONVOLATILE STORAGE;

EID: 0030084512     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)