Transient analysis of CML inverter using Monte Carlo simulations

Solid-State Electronics

Volumn 39, Issue 2, 1996, Pages 269-275

  Galdin, Sylvie ^a   Musalem, François Xavier ^a   Dollfus, Philippe ^a   Mouis, Mireille ^a,b   Hesto, Patrice ^a  

^a CNRS   (France)

^b ORANGE LABS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; CALCULATIONS; CAPACITANCE; CHARGE CARRIERS; COMPUTER SIMULATION; COMPUTER SOFTWARE; DELAY CIRCUITS; ELECTRIC INVERTERS; ELECTRIC RESISTANCE; MONTE CARLO METHODS;

DEPLETION CAPACITANCES; GATE DELAY TIME; SUBMICRON BIPOLAR TRANSISTORS; TRANSIENT ANALYSIS; WEIGHTING FACTOR VALUES;

GATES (TRANSISTOR);

EID: 0030084063     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(95)00106-9     Document Type: Review

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