Electronic interconnect reliability modelling

Soldering and Surface Mount Technology

Volumn , Issue 22, 1996, Pages 55-58

  Winter, P R ^a   Wallach, E R ^a  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; MATHEMATICAL MODELS; MICROSTRUCTURE; RELIABILITY; SOLDERED JOINTS; SOLDERING ALLOYS; STRAIN; SURFACE MOUNT TECHNOLOGY; THERMAL CYCLING; THERMAL STRESS;

ELECTRONIC COMPONENTS; ELECTRONIC INTERCONNECT; LIFE PREDICTION TECHNIQUES; MATERIAL NONLINEARITY;

ELECTRONIC EQUIPMENT;

EID: 0030083759     PISSN: 09540911     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (13)

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10. Moore, A., Elston, R. and Burrows, D., 'Solder Modelling for Surface Mount Technology', GEC Journal of Research, Vol. 6, No. 1, pp. 16-24 (1988).
11. Katchmar, R., 'Ball Grid Array Evaluation Plan', Northern Telecom internal report (1994).
12. Hashemi, 'BGA Thermal Reliability Characterisation Plan', unpublished MCC test proposal (1993).
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