Suppression of the boron penetration induced dielectric degradation by using a stacked-amorphous-silicon film as the gate structure for pmosfet

IEEE Transactions on Electron Devices

Volumn 43, Issue 2, 1996, Pages 303-310

  Lin, Shye ^a   Lee, Chung ^b   Lei, Tan ^b  

^a VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS FILMS; AMORPHOUS SILICON; ANNEALING; CHEMICAL VAPOR DEPOSITION; DEGRADATION; DIELECTRIC FILMS; FLUORINE; GATES (TRANSISTOR); GRAIN SIZE AND SHAPE; MATHEMATICAL MODELS; SEMICONDUCTING BORON;

ANNEALING TEMPERATURE; BORON PENETRATION EFFECTS; DIELECTRIC BREAKDOWN; GATE STRUCTURE; LOW PRESSURE CHEMICAL VAPOR DEPOSITION; OXIDATION TEMPERATURE; STACKED AMORPHOUS SILICON FILM;

MOSFET DEVICES;

EID: 0030083150     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.481732     Document Type: Article

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