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Volumn 31, Issue 2, 1996, Pages 230-239

A 965-Mb/s 1.0-μm standard CMOS twin-pipe serial/parallel multiplier

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; DATA COMMUNICATION SYSTEMS; DIGITAL ARITHMETIC; INTEGRATED CIRCUIT LAYOUT; PARALLEL PROCESSING SYSTEMS;

EID: 0030083065     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.488000     Document Type: Article
Times cited : (11)

References (7)
  • 3
    • 0023167503 scopus 로고
    • Techniques to increase the computational throughput of bit-serial architectures
    • Apr.
    • S. G. Smith, M. S. McGregor, and P. B. Denyer, "Techniques to increase the computational throughput of bit-serial architectures," in Proc. IEEE ICASSP'87, Apr. 1987, pp. 543-545.
    • (1987) Proc. IEEE ICASSP'87 , pp. 543-545
    • Smith, S.G.1    McGregor, M.S.2    Denyer, P.B.3
  • 4
    • 0029192354 scopus 로고
    • Optimizing a high-speed serial/parallel sum-of-products hardware structure with respect to bus utilization
    • P. Larsson-Edefors, "Optimizing a high-speed serial/parallel sum-of-products hardware structure with respect to bus utilization," in Proc. Inst. Elec. Eng.- E, Computers and Digital Tech., vol. 142, no. 1, 1995, pp. 77-80.
    • (1995) Proc. Inst. Elec. Eng.- E, Computers and Digital Tech. , vol.142 , Issue.1 , pp. 77-80
    • Larsson-Edefors, P.1
  • 5
    • 0028412967 scopus 로고
    • A 470-MHz CMOS true single-phase clocked bit-serial arithmetic unit
    • _, "A 470-MHz CMOS true single-phase clocked bit-serial arithmetic unit," IEEE Trans. Circuits Syst., I: Fundamental Theory and Applications, vol. 41, no. 4, pp. 337-341, 1994.
    • (1994) IEEE Trans. Circuits Syst., I: Fundamental Theory and Applications , vol.41 , Issue.4 , pp. 337-341
  • 7
    • 0025384746 scopus 로고
    • A unified single-phase clocking scheme for VLSI Systems
    • M. Afghahi and C. Svensson, "A unified single-phase clocking scheme for VLSI Systems," IEEE J. Solid-State Circuits, vol. 25, no. 1, pp. 225-233, 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.1 , pp. 225-233
    • Afghahi, M.1    Svensson, C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.