Robust design of rail-to-rail CMOS operational amplifiers for a low power supply voltage

IEEE Journal of Solid-State Circuits

Volumn 31, Issue 2, 1996, Pages 146-156

  Sakurai, Satoshi ^a,b,c,d,e,f   Ismail, Mohammed ^a,b,d,g  

^a IEEE

^b OHIO STATE UNIVERSITY   (United States)

^c NATIONAL SEMICONDUCTOR CORPORATION   (United States)

^d Ohio State University   (United States)

^e Amplifier Des Grp Natl S ^*

^f Amplifier Des Grp Natl S   (United States)

^g UNIVERSITY OF MANITOBA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC DISTORTION; ELECTRIC NETWORK PARAMETERS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC POWER SUPPLIES TO APPARATUS; TRANSCONDUCTANCE; TRANSISTORS;

BIAS CIRCUITS; BIAS CURRENTS; DIFFERENTIAL PAIRS; MOSIS TEST CHIPS; SUPPLY VOLTAGE; TOTAL HARMONIC DISTORTION; UNITY GAIN FREQUENCY;

OPERATIONAL AMPLIFIERS;

EID: 0030082853     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.487991     Document Type: Article

References (13)

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