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Volumn 9, Issue 1, 1996, Pages 27-34

Influence of short circuits on data of contact and via open circuits determined by a novel weave test structure

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CONTACTS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; INTEGRATED CIRCUITS;

EID: 0030081718     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/66.484280     Document Type: Article
Times cited : (4)

References (12)
  • 1
    • 0017536375 scopus 로고
    • Integrated circuit process and design rule evaluation techniques
    • Sept.
    • A. C. Ipri and J. C. Sarace, "Integrated circuit process and design rule evaluation techniques," RCA Rev., vol. 38, no. 3, pp. 323-350, Sept. 1977.
    • (1977) RCA Rev. , vol.38 , Issue.3 , pp. 323-350
    • Ipri, A.C.1    Sarace, J.C.2
  • 2
    • 0037840074 scopus 로고
    • Microelectronic test chips for VLSI electronics
    • New York: Academic, vol. 9, ch. 9
    • M. G. Buehler, "Microelectronic test chips for VLSI electronics," VLSI Electronics Microstructure Science, vol. 9. New York: Academic, 1983, vol. 9, ch. 9, pp. 529-576.
    • (1983) VLSI Electronics Microstructure Science , vol.9 , pp. 529-576
    • Buehler, M.G.1
  • 3
    • 0022680566 scopus 로고
    • CMOS test chip design for process problem debugging and yield prediction experiments
    • Mar.
    • W. Lukaszck, W. Yarbrough, T. Walker, and J. Meindl, "CMOS test chip design for process problem debugging and yield prediction experiments," Solid-State Technol., pp. 87-92, Mar. 1986.
    • (1986) Solid-State Technol. , pp. 87-92
    • Lukaszck, W.1    Yarbrough, W.2    Walker, T.3    Meindl, J.4
  • 5
    • 33748203890 scopus 로고
    • Teststrukturen zur effizienten produktionsbegleitenden Defektdiagnose und-analyse
    • Dresden
    • C. Hess, "Teststrukturen zur effizienten produktionsbegleitenden Defektdiagnose und-analyse," GME-Fachbericht 11: Vorträge der GME-Fachtagung Mikroelektronik, Dresden, pp. 485-490, 1993.
    • (1993) GME-Fachbericht 11: Vorträge der GME-Fachtagung Mikroelektronik , pp. 485-490
    • Hess, C.1
  • 6
    • 0028479745 scopus 로고
    • Modeling of real defect outlines and defect parameter extraction using a checkerboard test structure to localize defects
    • C. Hess and A. Ströle, "Modeling of real defect outlines and defect parameter extraction using a checkerboard test structure to localize defects," IEEE Trans. Semiconduct. Manufact. vol. 7, no. 3, pp. 284-292, 1994.
    • (1994) IEEE Trans. Semiconduct. Manufact. , vol.7 , Issue.3 , pp. 284-292
    • Hess, C.1    Ströle, A.2
  • 8
    • 0027969370 scopus 로고
    • Drop in process control checkerboard test structure for efficient online process characterization and defect problem debugging
    • San Diego
    • _, "Drop in process control checkerboard test structure for efficient online process characterization and defect problem debugging," in Proc. Int. Conf. Microelectronic Test Structures (ICMTS), San Diego, 1994, pp. 152-159.
    • (1994) Proc. Int. Conf. Microelectronic Test Structures (ICMTS) , pp. 152-159
  • 10
    • 0028015464 scopus 로고
    • Modeling of test structures for efficient online defect monitoring using a digital tester
    • San Diego
    • C. Hess and L. H. Weiland, "Modeling of test structures for efficient online defect monitoring using a digital tester," in Proc. Int. Conf., Microelectronic Test Structures (ICMTS), San Diego, 1994, pp. 108-113.
    • (1994) Proc. Int. Conf., Microelectronic Test Structures (ICMTS) , pp. 108-113
    • Hess, C.1    Weiland, L.H.2
  • 11
    • 0029491677 scopus 로고
    • A digital tester based measurement methodology for process control in multilevel metallization systems
    • Austin, TX
    • _, "A digital tester based measurement methodology for process control in multilevel metallization systems," in Proc. SPIE's Microelectronic Manufacturing, vol. 2637, Austin, TX, 1995, pp. 125-136.
    • (1995) Proc. SPIE's Microelectronic Manufacturing , vol.2637 , pp. 125-136
  • 12
    • 0029227334 scopus 로고
    • Resistance modeling of test structures for accurate fault detection in backend process steps using a digital tester
    • Nara, Japan
    • _, "Resistance modeling of test structures for accurate fault detection in backend process steps using a digital tester," in Proc. Int. Conf. Microelectronic Test Structures (ICMTS), Nara, Japan, 1995, pp. 265-270.
    • (1995) Proc. Int. Conf. Microelectronic Test Structures (ICMTS) , pp. 265-270


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.